mirror of
https://github.com/fail0verflow/switch-coreboot.git
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448e386309
On certain Winbond SuperIO devices, when a PS/2 mouse is not present on the auxiliary channel both channels will cease to function if the auxiliary channel is probed while the primary channel is active. Therefore, knowledge of mouse presence must be gathered by coreboot during early boot, and used to enable or disable the auxiliary PS/2 port before control is passed to the operating system. Add auxiliary channel PS/2 device presence detect, and update the Winbond W83667HG-A driver to flag the auxiliary channel as disabled if no device was detected. Change-Id: I76274493dacc9016ac6d0dff8548d1dc931c6266 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/13165 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Martin Roth <martinroth@google.com>
61 lines
1.7 KiB
C
61 lines
1.7 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2004 Stefan Reinauer <stefan.reinauer@coreboot.org>
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* Copyright (C) 2010 Kevin O'Connor <kevin@koconnor.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include <pc80/keyboard.h>
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#include <arch/io.h>
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static const unsigned char qemu_i440fx_irqs[] = {
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11, 10, 10, 11,
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11, 10, 10, 11,
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};
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static void qemu_nb_init(device_t dev)
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{
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/* Map memory at 0xc0000 - 0xfffff */
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int i;
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uint8_t v = pci_read_config8(dev, 0x59);
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v |= 0x30;
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pci_write_config8(dev, 0x59, v);
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for (i=0; i<6; i++)
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pci_write_config8(dev, 0x5a + i, 0x33);
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/* This sneaked in here, because Qemu does not
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* emulate a SuperIO chip
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*/
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pc_keyboard_init(NO_AUX_DEVICE);
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/* setup IRQ routing */
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for (i = 0; i < 32; i++)
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pci_assign_irqs(0, i, qemu_i440fx_irqs + (i % 4));
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}
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static struct device_operations nb_operations = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = qemu_nb_init,
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.ops_pci = 0,
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};
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static const struct pci_driver nb_driver __pci_driver = {
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.ops = &nb_operations,
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.vendor = 0x8086,
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.device = 0x1237,
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};
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