Scott Duplichan 444c49c68c Match DIMM SPD addressing to implemented slots. ... Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6575 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1		2011-05-15 21:13:00 +00:00
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arch/x86	Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an	2011-04-26 23:47:04 +00:00
boot	more ifdef -> if fixes.	2011-04-21 21:26:58 +00:00
console	Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an	2011-04-26 23:47:04 +00:00
cpu	Correct the number of MCA error reporting banks cleared.	2011-05-15 21:06:30 +00:00
devices	more ifdef -> if fixes	2011-04-21 20:45:45 +00:00
drivers	Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an	2011-04-26 23:47:04 +00:00
ec	Thinkpad: Enable Battery events	2011-04-28 09:29:06 +00:00
include	Change read_option() to a macro that wraps some API uglyness	2011-05-10 21:53:13 +00:00
lib	Change read_option() to a macro that wraps some API uglyness	2011-05-10 21:53:13 +00:00
mainboard	Match DIMM SPD addressing to implemented slots.	2011-05-15 21:13:00 +00:00
northbridge	Work around unclean CMOS handling for now	2011-05-11 07:44:27 +00:00
pc80	Change read_option() to a macro that wraps some API uglyness	2011-05-10 21:53:13 +00:00
southbridge	RS780 DDI Lanes configure support,	2011-05-07 08:51:32 +00:00
superio	some ifdef --> if fixes	2011-04-21 20:24:43 +00:00
vendorcode	SB800 CIMX code can share the AGESA V5 lib code,	2011-05-07 08:43:40 +00:00
Kconfig	Add option 'compress ramstage'	2011-05-02 19:53:04 +00:00
Kconfig.deprecated_options	some ifdef --> if fixes	2011-04-21 20:24:43 +00:00