switch-coreboot/doc/design
Carl-Daniel Hailfinger 3de758e98a Update the design doc to match a mixture of wishful thinking and
reality.
* We use LAR and not CPIO
* printk() can be called from stage 1 without ill effects
* stage 2 phase 1 is without purpose

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@511 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-11-17 15:28:02 +00:00
..
flashlayout.fig Move documentation/ to doc/. 2006-11-22 17:39:55 +00:00
newboot.lyx Update the design doc to match a mixture of wishful thinking and 2007-11-17 15:28:02 +00:00