coreboot for the Switch
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Martin Roth 394a5c128b UPSTREAM: util/docker: Update makefile target names
- Use dashes instead of underscores for consistency and to match other
coreboot targets
- Fix a couple of places where old target names were referenced
- Remove double 'help' target from .PHONEY target list

BUG=none
BRANCH=none
TEST=none

Change-Id: I7299b7aba9316f14dc963d3edaf313ce4c70cb11
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 9ee70ce587
Original-Change-Id: I3b464ebf74653a8cc880e982316fd883757ec728
Original-Signed-off-by: Martin Roth <gaumless@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/18000
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://chromium-review.googlesource.com/433980
2017-01-28 04:11:05 -08:00
configs UPSTREAM: configs/builder: Remove pre-defined VGA bios file 2017-01-22 05:03:18 -08:00
Documentation UPSTREAM: Documentation: Add Kconfig document 2016-11-14 19:59:15 -08:00
payloads UPSTREAM: nvramcui: Declare variable outside for loop 2017-01-27 07:48:58 -08:00
src UPSTREAM: drivers/pc80/rtc: Check cmos checksum BEFORE reading cmos value 2017-01-28 04:11:03 -08:00
util UPSTREAM: util/docker: Update makefile target names 2017-01-28 04:11:05 -08:00
.checkpatch.conf UPSTREAM: Update .checkpatch.conf 2016-09-06 13:26:39 -07:00
.clang-format Provide coreboot coding style formalisation file for clang-format 2015-11-10 00:49:03 +01:00
.gitignore UPSTREAM: .gitignore: Dont track Tint directory 2017-01-23 02:03:27 -08:00
.gitmodules Make upstream tree CrOS SDK friendly 2016-05-12 15:42:17 -06:00
.gitreview add .gitreview 2012-11-01 23:13:39 +01:00
COMMIT-QUEUE.ini Make upstream tree CrOS SDK friendly 2016-05-12 15:42:17 -06:00
COPYING update license template. 2006-08-12 22:03:36 +00:00
gnat.adc UPSTREAM: gnat.adc: Do not generate assertion code for Refined_Post 2016-11-03 14:44:05 -07:00
MAINTAINERS UPSTREAM: MAINTAINERS: Add lowrisc files to RISC-V 2016-11-14 19:59:10 -08:00
Makefile UPSTREAM: build system: don't run xcompile or git for %clean/%config targets 2017-01-26 18:43:51 -08:00
Makefile.inc UPSTREAM: Only add etc/ps2-keyboard-spinup when not updating an image 2017-01-28 04:11:04 -08:00
PRESUBMIT.cfg Make upstream tree CrOS SDK friendly 2016-05-12 15:42:17 -06:00
README UPSTREAM: Remove extra newlines from the end of all coreboot files. 2016-08-04 23:36:56 -07:00
toolchain.inc UPSTREAM: Add minimal GNAT run time system (RTS) 2016-09-21 19:36:46 -07:00

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * make
 * gcc / g++
   Because Linux distribution compilers tend to use lots of patches. coreboot
   does lots of "unusual" things in its build system, some of which break due
   to those patches, sometimes by gcc aborting, sometimes - and that's worse -
   by generating broken object code.
   Two options: use our toolchain (eg. make crosstools-i386) or enable the
   ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this
   case).
 * iasl (for targets with ACPI support)

Optional:

 * doxygen (for generating/viewing documentation)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig' and 'make nconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.