mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
352b76badd
Instead of having the SMI handler power off the touchscreen on the
way into suspend add power resource controls to the ACPI device so
the power is managed by the kernel instead of the BIOS.
BUG=b:35581264
TEST=manual testing on Eve to ensure that the touchscreen is still
functional at boot and after suspend/resume, and that it does not
draw power in suspend.
Change-Id: Ic1dd4ed8faab367347a4150c415a5cd40adb25f6
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: f124b88cfb
Original-Change-Id: Id9a98807d24bbc7dff32408f3d113f6fad5bc023
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/19946
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/521028
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
47 lines
1.2 KiB
C
47 lines
1.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2016 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/io.h>
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#include <cpu/x86/smm.h>
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#include <ec/google/chromeec/smm.h>
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#include <gpio.h>
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#include <soc/smm.h>
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#include "ec.h"
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#include "gpio.h"
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void mainboard_smi_espi_handler(void)
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{
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chromeec_smi_process_events();
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}
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static void mainboard_gpio_smi_sleep(u8 slp_typ)
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{
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/* Power down the rails on any sleep type */
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gpio_set(EN_PP3300_DX_CAM, 0);
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}
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void mainboard_smi_sleep(u8 slp_typ)
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{
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chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS,
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MAINBOARD_EC_S5_WAKE_EVENTS);
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mainboard_gpio_smi_sleep(slp_typ);
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}
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int mainboard_smi_apmc(u8 apmc)
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{
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chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS,
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MAINBOARD_EC_SMI_EVENTS);
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return 0;
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}
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