mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
c275218a89
accordance to the newboot document: * reset vector (16 bytes) * vpd (240bytes) * boot block (8k - 256b) * lar archive (256-8 k) The boot block is kind of simple, still. It enables pmode, car, and starts looking for an initram module in the lar archive. Note: This doesnt do much at the moment, as gas seems to produce buggy code in init.S. Take this as a suggestion of how it might work and please provide patches fixing it and bringing it into shape. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@62 f3766cd6-281f-0410-b1cd-43a5c92072e9
70 lines
1.2 KiB
C
70 lines
1.2 KiB
C
#include <arch/types.h>
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#include <arch/hlt.h>
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#include <console/loglevel.h>
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#include "config.h"
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// FIXME: we need this for varargs
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#include <stdarg.h>
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#if MAXIMUM_CONSOLE_LOGLEVEL <= BIOS_DEBUG
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#define debug(msg_level, fmt, arg...) printk(msg_level, fmt, ##arg)
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#endif
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#ifndef LINUXBIOS_EXTRA_VERSION
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#define LINUXBIOS_EXTRA_VERSION ""
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#endif
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/* printk's without a loglevel use this.. */
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#define DEFAULT_MESSAGE_LOGLEVEL 4 /* BIOS_WARNING */
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extern int vtxprintf(void (*)(unsigned char), const char *, va_list);
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extern void uart8250_tx_byte(unsigned, unsigned char);
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int console_loglevel()
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{
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return 8;
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}
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void console_tx_byte(unsigned char byte)
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{
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if (byte == '\n')
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uart8250_tx_byte(TTYS0_BASE, '\r');
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uart8250_tx_byte(TTYS0_BASE, byte);
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}
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int printk(int msg_level, const char *fmt, ...)
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{
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va_list args;
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int i;
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if (msg_level >= console_loglevel()) {
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return 0;
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}
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va_start(args, fmt);
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i = vtxprintf(console_tx_byte, fmt, args);
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va_end(args);
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return i;
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}
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void console_init(void)
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{
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static const char console_test[] =
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"\n\nLinuxBIOS-"
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LINUXBIOS_VERSION
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LINUXBIOS_EXTRA_VERSION
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" "
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LINUXBIOS_BUILD
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" starting...\n";
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printk(BIOS_INFO, console_test);
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}
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void die(const char *str)
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{
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printk(BIOS_EMERG,str);
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do {
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hlt();
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} while(1);
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}
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