mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
in. include/device/pnp.h: Add enable, val, and irq & drq structs. superio/winbond/w83627hf/superio.c: Change functions to operate on children. Add device ID to ops. Add enables to pnp_dev_info table. Fill in dts values. superio/winbond/w83627hf/dts: Get rid of device number parameters. Add config parameters so we know when they're set. device/pnp_device.c: Allocate devices as children to SuperIO. mainboard/amd/serengeti/dts: Move ioport so it's found. (Not its permanent resting place I hope.) Add enables for KBC, SP1, and HWM to show it off. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1027 f3766cd6-281f-0410-b1cd-43a5c92072e9 |
||
---|---|---|
.. | ||
agp.h | ||
cardbus.h | ||
device.h | ||
hypertransport.h | ||
hypertransport_def.h | ||
path.h | ||
pci.h | ||
pci_def.h | ||
pci_ids.h | ||
pci_ops.h | ||
pci_rom.h | ||
pcie.h | ||
pcix.h | ||
pnp.h | ||
resource.h | ||
smbus.h | ||
smbus_def.h |