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coreboot for the Switch
the logs. (Yes, I read logs.) Looking at the log of a qemu x86 boot with a 1024 kB image, I'd say something is really broken. Excerpts of my log quoted below: > [...] > LAR: Attempting to open 'fallback/initram/segment0'. > LAR: Start 0xfff00000 len 0x100000 > LAR: seen member normal/option_table > LAR: seen member normal/stage2/segment0 > LAR: seen member normal/stage2/segment1 > LAR: seen member normal/stage2/segment2 > LAR: seen member normal/initram/segment0 > LAR: seen member bootblock > LAR: File not found! > [...] > LAR: Attempting to open 'normal/initram/segment0'. > LAR: Start 0xfff00000 len 0x100000 > LAR: seen member normal/option_table > LAR: seen member normal/stage2/segment0 > LAR: seen member normal/stage2/segment1 > LAR: seen member normal/stage2/segment2 > LAR: seen member normal/initram/segment0 > LAR: CHECK normal/initram/segment0 @ 0xfff040d0 > [...] > LAR: Attempting to open 'normal/option_table'. > LAR: Start 0xfffc0000 len 0x3c000 WTF?!? This start address is obviously very wrong. > LAR: seen member bootblock > LAR: File not found! Which results in not finding the option table. > [...] > LAR: Attempting to open 'normal/payload'. > LAR: Start 0xfff00000 len 0x100000 > LAR: seen member normal/option_table > LAR: seen member normal/stage2/segment0 > LAR: seen member normal/stage2/segment1 > LAR: seen member normal/stage2/segment2 > LAR: seen member normal/initram/segment0 > LAR: seen member bootblock > LAR: File not found! > [...] The bug is in arch/x86/mc146818rtc.c: > struct cmos_option_table *get_option_table(void) > { > struct mem_file result, archive; > int ret; > > // FIXME - i want to be dynamic. > archive.len=(CONFIG_COREBOOT_ROMSIZE_KB-16)*1024; We can't calculate len like that. Reasons: - We can't know at compile time how big the archive is going to be. - Subtracting 16 kB from the ROM size was needed when the bootblock was not part of the LAR. These times are long gone. > archive.start=(void *)(0UL-(CONFIG_COREBOOT_ROMSIZE_KB*1024)); Since the len calculation above is invalid, start is wrong as well. > ret = find_file(&archive, "normal/option_table", &result); > if (ret) { > printk(BIOS_ERR, "No such file '%s'.\n", > "normal/option_table"); > return (struct cmos_option_table *)NULL; > } > return (struct cmos_option_table *) result.start; > } Use the existing init_archive function to find the LAR in memory. This fixes the case where the option table was not found depending on a few unrelated parameters. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@584 f3766cd6-281f-0410-b1cd-43a5c92072e9 |
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arch/x86 | ||
device | ||
doc/design | ||
include | ||
lib | ||
mainboard | ||
northbridge | ||
southbridge | ||
superio | ||
util | ||
COPYING | ||
HACKING | ||
Kconfig | ||
Makefile | ||
README | ||
Rules.make |
------------------------------------------------------------------------------- coreboot README ------------------------------------------------------------------------------- Coreboot is a Free Software project aimed at replacing the proprietary BIOS you can find in most of today's computers. It performs just a little bit of hardware initialization and then executes one of many possible payloads. Payloads -------- After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot. Examples include: * A Linux kernel * FILO (a simple bootloader with filesystem support) * GRUB2 (a free bootloader; support is in development) * OpenBIOS (a free IEEE1275-1994 Open Firmware implementation) * Open Firmware (a free IEEE1275-1994 Open Firmware implementation) * SmartFirmware (a free IEEE1275-1994 Open Firmware implementation) * GNUFI (a free, UEFI-compatible firmware) * Etherboot (for network booting and booting from raw IDE or FILO) * ADLO (for booting Windows 2000 or OpenBSD) * Plan 9 (a distributed operating system) * memtest86 (for testing your RAM) Supported Hardware ------------------ Coreboot supports a wide range of chipsets, devices, and mainboards. For details please consult: * http://www.coreboot.org/Supported_Motherboards * http://www.coreboot.org/Supported_Chipsets_and_Devices Build Requirements ------------------ * gcc / g++ * make * bison * flex * libncurses5-dev Optional (for generating/viewing documentation): * lyx * doxygen Building And Installing ----------------------- Note: Currently only the x86 QEMU target is supported in coreboot-v3. 1) Build a payload: THIS IS NOT IMPLEMENTED YET. PLEASE BUILD YOUR PAYLOAD MANUALLY. $ make payload This step is optional. The 'make payload' command will execute a helper tool which allows you to easily build and configure a wide variety of payloads. The result of this step is usually a file called 'payload.elf' in the top-level directory. 2) Configure coreboot: $ make menuconfig Select at least the desired mainboard vendor, the mainboard device, and the size of your ROM chip. Per default coreboot will look for a file called 'payload.elf' in the current directory and use that as the payload. If that's not what you want, you can change the path/filename of the payload to use some other payload file. Or you can choose 'No payload' in the configuration menu, in which case the resulting coreboot ROM image will not contain any payload. You'll have to manually add a payload later using the 'lar' utility for the coreboot ROM image to be useful. 3) Build the coreboot ROM image: $ make The generated ROM image is the file coreboot.rom in the build/ directory. 4) Flash the coreboot ROM image on a BIOS chip: $ flashrom -wv coreboot.rom NOTE: This step will OVERWRITE the current BIOS located on the ROM chip! Make sure you have adequate backup facilities before performing this step, otherwise you might not be able to recover in case of problems. If you have any questions, please contact us on the mailing list! The 'flashrom' tool is located in util/flashrom where you can build it from source code by typing 'make'. Alternatively, your favorite Linux distribution might ship a 'flashrom' package which provides the 'flashrom' program in (e.g.) /usr/sbin. On Debian GNU/Linux systems you can get the flashrom package via 'apt-get install flashrom'. Testing coreboot Without Modifying Your Hardware ------------------------------------------------- If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU. The required steps are: $ make menuconfig Select 'Emulated systems' as mainboard vendor and 'QEMU x86' as mainboard model. $ make $ qemu -L build -hda /dev/zero -serial stdio This will run coreboot in QEMU and output all debugging messages (which are usually emitted to a serial console) on stdout. It will not do anything useful beyond that, as you provided no virtual harddrive to QEMU (-hda /dev/zero). If you have a full QEMU hard drive image (say /tmp/qemu.img) with a Linux distribution installed, you can boot that Linux kernel by using a proper FILO payload with coreboot and typing: $ qemu -L build -hda /tmp/qemu.img -serial stdio Installing a Linux distribution in QEMU and building the FILO payload is beyond the scope of this document. Website and Mailing List ------------------------ Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website: http://www.coreboot.org You can contact us directly on the coreboot mailing list: http://www.coreboot.org/Mailinglist Copyright and License --------------------- The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details. Coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other Free Software projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details. This makes the resulting coreboot images licensed under the GPL, version 2.