Emulation/switch-coreboot
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switch-coreboot/src
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Uwe Hermann 1a9c892d58 Initial Intel 440BX RAM initialization framework. 
This does _not_ fully work, yet. You will _not_ be able to boot any
payload with this code, yet.

Add missing license headers.

Base the northbridge.c file on the Intel 855PM version, that comes
closer to what we want.

The raminit.c file is written from scratch and hardcodes several
values for now. This needs to be fixed later by reading the
correct values via SPD.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2576 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-01 17:24:03 +00:00
..
arch This patch splits console.c into 3 different files to get a better 2007-03-02 14:21:09 +00:00
boot Apply linuxbios-rename-other-payload-options.patch 2006-12-15 12:56:28 +00:00
config This is (most of) the usb2 debug console code ripped out of 2007-02-28 11:17:02 +00:00
console This is (most of) the usb2 debug console code ripped out of 2007-02-28 11:17:02 +00:00
cpu This is (most of) the usb2 debug console code ripped out of 2007-02-28 11:17:02 +00:00
devices This change fixes a long-standing bug, whereby we do not set ret for an 2006-10-27 18:22:13 +00:00
drivers Use the canonical name of the vendors/devices and the 2006-11-05 18:50:49 +00:00
include This is (most of) the usb2 debug console code ripped out of 2007-02-28 11:17:02 +00:00
lib This is (most of) the usb2 debug console code ripped out of 2007-02-28 11:17:02 +00:00
mainboard fix a stupid cut and paste error. 2007-03-20 13:43:50 +00:00
northbridge Initial Intel 440BX RAM initialization framework. 2007-04-01 17:24:03 +00:00
pc80 This is (most of) the usb2 debug console code ripped out of 2007-02-28 11:17:02 +00:00
pmc/altimus/mpc7410 Use the common LinuxBIOS license header (trivial). Refs #5. 2006-12-05 15:27:46 +00:00
ram - Adds support for the Advantech eval board. Configuration was produced 2006-04-01 04:10:44 +00:00
sdram 1201_ht_bus0_dev0_fidvid_core.diff 2005-12-02 21:52:30 +00:00
southbridge Add initial pre-RAM serial output support for the VIA VT82C686(A/B) 2007-03-17 14:00:23 +00:00
stream This eliminates an illegal and annoying warning. 2007-02-03 10:43:48 +00:00
superio Add support for the NSC PC87309 Super I/O. 2007-03-31 19:45:24 +00:00