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https://github.com/fail0verflow/switch-coreboot.git
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14d09264a2
Include assert.h to use coreboot's ASSERT macro. Replace the use of UINT32 data type with uint32_t. Replace the use of UINT8 data type with uint8_t. TEST=Build and run on Galileo Gen2 Change-Id: I0bb7e43ea570f7b20355c5d05675ebf593942e83 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15858 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
41 lines
1.1 KiB
C
41 lines
1.1 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2015-2016 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <cbmem.h>
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#include <fsp/memmap.h>
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#include <soc/QuarkNcSocId.h>
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#include <soc/reg_access.h>
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size_t mmap_region_granularity(void)
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{
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/* Align to 8 MiB by default */
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return 8 << 20;
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}
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void *cbmem_top(void)
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{
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uint32_t top_of_memory;
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/* Determine the TSEG base */
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top_of_memory = reg_host_bridge_unit_read(QNC_MSG_FSBIC_REG_HSMMC);
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top_of_memory &= SMM_START_MASK;
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top_of_memory <<= 16;
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/* Reserve 64 KiB for RMU firmware */
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top_of_memory -= 0x10000;
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/* Return the top of memory */
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return (void *)top_of_memory;
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}
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