mirror of
https://github.com/fail0verflow/switch-coreboot.git
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12de698c24
This patch pulls in NetBSD's full cache flushing algorithm for ARM, to replace our old, slow and slightly overzealous C-only implementation. It's a beautiful piece of code that manages to run on only caller-saved registers (meaning it doesn't need to write to memory) in a very tight loop, and it's BSD-licensed to boot (which we need for libpayload). Unfortunately it's also not quite correct, but I can fix that. Pulling the original in a separate commit to make it more obvious what changes are mine. Change-Id: I7a71c9e570866a6e25f756cb09ae2b6445048d83 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/183878 Reviewed-by: Stefan Reinauer <reinauer@google.com> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: David Hendricks <dhendrix@chromium.org> (cherry picked from commit 4698467320613d7ddc39714f40aacbc990af9399) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6931 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> |
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| .. | ||
| arch | ||
| console | ||
| cpu | ||
| device | ||
| drivers | ||
| ec | ||
| include | ||
| lib | ||
| mainboard | ||
| northbridge | ||
| soc | ||
| southbridge | ||
| superio | ||
| vendorcode | ||
| Kconfig | ||