switch-coreboot/southbridge
Ronald G. Minnich 159354e6ba If you get a warning, it's because you SHOULD be getting a warning.
next step is to fix up this:
   LAR     build/coreboot.rom
Bootblock coreboot.bootblock does not appear to be a bootblock.
Error adding the bootblock to the LAR.
make: *** [/home/rminnich/src/bios/coreboot-v3/build/coreboot.rom] Error 
1
make: exit 2

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@809 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-24 03:27:28 +00:00
..
amd If you get a warning, it's because you SHOULD be getting a warning. 2008-08-24 03:27:28 +00:00
intel/i82371eb Minor cosmetic and/or license header fixes (trivial). 2008-08-11 21:01:54 +00:00
nvidia/mcp55 The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots of 2008-08-22 18:24:53 +00:00