switch-coreboot/southbridge/nvidia/mcp55/usb2.c
Ronald G. Minnich 11c6d0d98d m57sli mostly builds again. The stage0 is too large at 24k.
We need to figure out if we should just grow stage0. My inclination is 
to say 'yes'.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@877 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-10-01 07:23:05 +00:00

83 lines
2.3 KiB
C

/*
* This file is part of the coreboot project.
*
* Copyright (C) 2004 Tyan Computer
* Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer.
* Copyright (C) 2006,2007 AMD
* Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <types.h>
#include <lib.h>
#include <console.h>
#include <device/pci.h>
#include <msr.h>
#include <legacy.h>
#include <device/pci_ids.h>
#include <statictree.h>
#include <config.h>
#include "mcp55.h"
#ifdef CONFIG_USBDEBUG_DIRECT
#include <usbdebug_direct.h>
#endif
// yeah right. not yet. extern struct ehci_debug_info dbg_info;
static void usb2_init(struct device *dev)
{
u32 dword;
dword = pci_read_config32(dev, 0xf8);
dword |= 40;
pci_write_config32(dev, 0xf8, dword);
}
static void usb2_set_resources(struct device *dev)
{
#ifdef CONFIG_USBDEBUG_DIRECT
struct resource *res;
unsigned base;
unsigned old_debug;
old_debug = get_ehci_debug();
set_ehci_debug(0);
#endif
pci_dev_set_resources(dev);
#ifdef CONFIG_USBDEBUG_DIRECT
res = find_resource(dev, 0x10);
set_ehci_debug(old_debug);
if (!res) return;
base = res->base;
set_ehci_base(base);
report_resource_stored(dev, res, "");
#endif
}
struct device_operations mcp55_usb2 = {
.id = {.type = DEVICE_ID_PCI,
{.pci = {.vendor = PCI_VENDOR_ID_NVIDIA,
.device = PCI_DEVICE_ID_NVIDIA_MCP55_USB2}}},
.constructor = default_device_constructor,
.phase3_scan = 0,
.phase4_read_resources = pci_dev_read_resources,
.phase4_set_resources = usb2_set_resources,
.phase5_enable_resources = pci_dev_enable_resources,
.phase6_init = usb2_init,
.ops_pci = &mcp55_pci_dev_ops_pci,
};