mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
0f7f76fb40
Highlights: - elfboot.c Now can load images to the ram location where linuxBIOS is running - Added the standalone directory for bootloaders built from the linuxBIOS source Other things: - Correctly maode fallback_boot.c conditional - Added entry32.lds to do the math for segment descriptor table entries - Merged ldscript.cacheram and ldscript.base - Moved assembly code to the sections .rom.text and .rom.data - Modified linuxBIOS so C code completely runs from RAM as the SiS630 case does - Updated and commented example config files for the supermicro p4dc6 - Bumped the elfboot loader version to 1.0 - Removed extra carriage returns in dump_northbridge.inc (DOS->UNIX) - General cleanups to the config of the supermicro p4dc6
32 lines
593 B
Text
32 lines
593 B
Text
arch i386
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mainboardinit cpu/i386/entry16.inc
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mainboardinit cpu/i386/entry32.inc
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ldscript cpu/i386/entry16.lds
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ldscript cpu/i386/entry32.lds
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mainboardinit cpu/i386/reset16.inc
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ldscript cpu/i386/reset16.lds
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mainboardinit pc80/serial.inc
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mainboardinit arch/i386/lib/console.inc
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northbridge intel/82830
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southbridge intel/82801
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mainboardinit cpu/p6/earlymtrr.inc
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# option FLASH_ROM_SIZE=524288
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option ENABLE_FIXED_AND_VARIABLE_MTRRS
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option NO_KEYBOARD
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option HAVE_PIRQ_TABLE=1
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option ZKERNEL_START=0xfffc0000
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option ZKERNEL_MASK=0x7f
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object mainboard.o
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object irq_tables.o
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cpu p6
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cpu p5
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