mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
0f7f76fb40
Highlights: - elfboot.c Now can load images to the ram location where linuxBIOS is running - Added the standalone directory for bootloaders built from the linuxBIOS source Other things: - Correctly maode fallback_boot.c conditional - Added entry32.lds to do the math for segment descriptor table entries - Merged ldscript.cacheram and ldscript.base - Moved assembly code to the sections .rom.text and .rom.data - Modified linuxBIOS so C code completely runs from RAM as the SiS630 case does - Updated and commented example config files for the supermicro p4dc6 - Bumped the elfboot loader version to 1.0 - Removed extra carriage returns in dump_northbridge.inc (DOS->UNIX) - General cleanups to the config of the supermicro p4dc6
129 lines
2.7 KiB
Text
129 lines
2.7 KiB
Text
/*
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* Memory map:
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*
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* _RAMBASE
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* : data segment
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* : bss segment
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* : heap
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* : stack
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* _ROMBASE
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* : linuxbios text
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* : readonly text
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*/
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/*
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* Bootstrap code for the STPC Consumer
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* Copyright (c) 1999 by Net Insight AB. All Rights Reserved.
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*
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* $Id$
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*
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*/
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/*
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* Written by Johan Rydberg, based on work by Daniel Kahlin.
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* Rewritten by Eric Biederman
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*/
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/*
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* We use ELF as output format. So that we can
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* debug the code in some form.
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*/
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OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
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OUTPUT_ARCH(i386)
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ENTRY(_start)
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SECTIONS
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{
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. = DEFINED(_ROMBASE)? _ROMBASE : _RAMBASE;
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/* This section might be better named .setup */
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.rom . : {
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_rom = .;
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*(.rom.text);
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*(.rom.data);
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. = ALIGN(16);
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_erom = .;
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}
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_lrom = LOADADDR(.rom);
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_elrom = LOADADDR(.rom) + SIZEOF(.rom);
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. = DEFINED(_ROMBASE)? _RAMBASE : . ;
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/*
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* First we place the code and read only data (typically const declared).
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* This get placed in rom.
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*/
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.text . : AT (_elrom) {
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_text = .;
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*(.text);
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*(.text.*);
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. = ALIGN(16);
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_etext = .;
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}
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_ltext = LOADADDR(.text);
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_eltext = LOADADDR(.text) + SIZEOF(.text);
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.rodata . : AT(_eltext){
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_rodata = .;
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. = ALIGN(4);
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streams = . ;
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*(.rodata.streams)
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estreams = .;
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*(.rodata)
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*(.rodata.*)
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_erodata = .;
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}
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_lrodata = LOADADDR(.rodata);
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_elrodata = LOADADDR(.rodata) + SIZEOF(.rodata);
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/*
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* After the code we place initialized data (typically initialized
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* global variables). This gets copied into ram by startup code.
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* __data_start and __data_end shows where in ram this should be placed,
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* whereas __data_loadstart and __data_loadend shows where in rom to
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* copy from.
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*/
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.data . : AT(_elrodata) {
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_data = .;
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*(.data)
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_edata = .;
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}
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_ldata = LOADADDR(.data);
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_eldata = LOADADDR(.data) + SIZEOF(.data);
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/* The initialized data segment.
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* This is all of the data that we copy from rom into the ram.
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*/
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_iseg = _text;
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_eiseg = _edata;
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_liseg = _ltext;
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_eliseg = _eldata;
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/*
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* bss does not contain data, it is just a space that should be zero
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* initialized on startup. (typically uninitialized global variables)
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* crt0.S fills between _bss and _ebss with zeroes.
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*/
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.bss . : {
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_bss = .;
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*(.bss)
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*(.sbss)
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*(COMMON)
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_ebss = .;
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}
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_end = .;
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.stack . : {
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_stack = .;
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/* Reserve a stack for each possible cpu, +1 extra */
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. = ((MAX_CPUS * STACK_SIZE) + STACK_SIZE) ;
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_estack = .;
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}
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.heap . : {
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_heap = .;
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/* Reserve 256K for the heap */
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. = HEAP_SIZE ;
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. = ALIGN(4);
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_eheap = .;
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}
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/* The ram segment
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* This is all address of the memory resident copy of linuxBIOS.
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*/
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_ram_seg = _text;
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_eram_seg = _eheap;
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/DISCARD/ : {
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*(.comment)
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*(.note)
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}
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}
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