switch-coreboot/arch/x86
Ronald G. Minnich 0e68335b17 Fix a typo in device.c -- calling phase1 in phase2
start documenting the device model -- since it is clear to me from
reading v2 that not even the v2 guys totally got it
call write_tables in stage2
fix the makefile to put stage2.o first to make sure it gets
called. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@135 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-26 19:24:33 +00:00
..
archelfboot.c some dependencies fixes. 2007-02-26 13:59:35 +00:00
archtables.c This wraps up re-adding linuxbios table support in a limited form. 2007-02-26 14:54:21 +00:00
cache_as_ram.S Add a first bit of a framework. Builds the following parts, in 2007-01-29 22:09:50 +00:00
cachemain.c The newelfboot code is correctly loading filo.elf. It is running from 2007-02-23 21:16:47 +00:00
config.h Architecture changes. This gets us through stage 2. 2007-02-22 21:39:25 +00:00
console.c fix more warnings. 2007-02-23 12:36:45 +00:00
init.S Add a first bit of a framework. Builds the following parts, in 2007-01-29 22:09:50 +00:00
Kconfig some dependencies fixes. 2007-02-26 13:59:35 +00:00
ldscript.ld our code grew quickly. Since stage0 carries the library for all the 2007-02-23 14:04:39 +00:00
linuxbios_table.c This wraps up re-adding linuxbios table support in a limited form. 2007-02-26 14:54:21 +00:00
macros.h Add a license header where it was missing. 2007-01-30 11:10:39 +00:00
Makefile Fix a typo in device.c -- calling phase1 in phase2 2007-02-26 19:24:33 +00:00
mtrr.h Add a first bit of a framework. Builds the following parts, in 2007-01-29 22:09:50 +00:00
reset.S Add a license header where it was missing. 2007-01-30 11:10:39 +00:00
serial.c * add config options for serial port and speed 2007-02-23 13:55:28 +00:00
stage0_i586.S Pick a safer default for CacheBase -- not C segment. 2007-02-23 07:15:58 +00:00