switch-coreboot/mainboard/amd/Kconfig
Ronald G. Minnich 7102949d76 We're much closer.
Added a stepping enum to k8.h. This will allow us to do things like this:
if (cpu_stepping(node) < E0)

and so on instead of is_cpu_pre_e0_in_bsp or whatever it is. 

Added and fixed Kconfig variables. 

Broke out northbridge by function, so we can see what goes with what. 

This tree still builds a working DBE62 coreboot that boots a kernel; no harm done to existing ports. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@781 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-17 22:18:09 +00:00

77 lines
1.9 KiB
Text

##
## This file is part of the coreboot project.
##
## Copyright (C) 2007 coresystems GmbH
## (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
choice
prompt "Mainboard model"
depends on VENDOR_AMD
config BOARD_AMD_DB800
bool "DB800"
select ARCH_X86
select CPU_AMD_GEODELX
select OPTION_TABLE
select NORTHBRIDGE_AMD_GEODELX
select SOUTHBRIDGE_AMD_CS5536
select SUPERIO_WINBOND_W83627HF
select PIRQ_TABLE
help
AMD DB800 Geode LX development board.
config BOARD_AMD_NORWICH
bool "Norwich"
select ARCH_X86
select CPU_AMD_GEODELX
select OPTION_TABLE
select NORTHBRIDGE_AMD_GEODELX
select SOUTHBRIDGE_AMD_CS5536
select PIRQ_TABLE
help
AMD Norwich Geode LX development board.
config BOARD_AMD_SERENGETI
bool "Serengeti"
select ARCH_X86
select OPTION_TABLE
select CPU_AMD_K8
select NORTHBRIDGE_AMD_K8
select SOUTHBRIDGE_AMD_AMD8111
select IOAPIC
select APIC_ID_OFFSET
help
AMD Serengeti
endchoice
config MAINBOARD_DIR
string
default amd/db800
depends BOARD_AMD_DB800
config MAINBOARD_DIR
string
default amd/norwich
depends BOARD_AMD_NORWICH
config MAINBOARD_DIR
string
default amd/serengeti
depends BOARD_AMD_SERENGETI