mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
d96aab9e06
- VIA 686 cleanups from the A7M code (it now works in a different pci slot). - Update of assembly printing routines to use the debug levels: TTYS0_TX_CHAR now becomes CONSOLE_<LEVEL>_TX_CHAR. It's more verbose but now the controls are the same as with the C code. - Break off of loglevel.h from printk.h. loglevel.h is safe for both the assembly routines and the C code to include. - Next round of commits for the supermicro p4dc6 - SMP setup updates (Rons board is broken) I now allow the other SMP processors to report their existence. I really need to add a minimum time to run but that hasn't happened yet. - SMP per motherboard table of apicids, as the assumption that they would always be 0 & 1 with only two cpus fails. - RDRAM setup updates. The code isn't done but it now works on more than one board at a time. - More cacheram work. Minor bug fixes and some macros to use it from C. - Entry point changes so we no longer have to jump over our gdt. - Added/Audited the cpufixup for the i786 - IDE intialization for the 82801 ich2 chip. |
||
|---|---|---|
| .. | ||
| MS7308E | ||
| MS7308E_FLASHROOT | ||
| RON_ASUS_CUA | ||
| RON_ASUS_CUA_DOC | ||
| RON_ASUS_CUA_DOC2 | ||
| RON_GA6-BXC | ||
| RON_L440GX | ||
| RON_L440GX_SCSI | ||
| RON_TYAN_S1834 | ||
| RON_VIA_SPD | ||
| RON_VT5259A | ||
| RON_VT5426 | ||
| RON_WINFAST6300 | ||
| WINFAST6300_FLASHROOT | ||
| WINFAST6300_SERCONS | ||