mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
1619ed3a0d
Removes the pre-defined VGA bios file and id because
the build system includes every vgabios.
Also make the VGA output primary by default
BUG=none
BRANCH=none
TEST=none
Change-Id: I851d602b470b1f0b504d07d5fe70fd58f20ae1a8
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 5c765ceff9
Original-Change-Id: I87d52ef2d1e151c6e54beba64316fe9043668158
Original-Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Original-Reviewed-on: https://review.coreboot.org/18181
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/430617
Commit-Ready: Aaron Durbin <adurbin@chromium.org>
Tested-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
18 lines
500 B
Text
18 lines
500 B
Text
CONFIG_USE_OPTION_TABLE=y
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CONFIG_USE_BLOBS=y
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CONFIG_VENDOR_LENOVO=y
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CONFIG_HAVE_IFD_BIN=y
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CONFIG_HAVE_ME_BIN=y
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CONFIG_DRIVERS_PS2_KEYBOARD=y
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CONFIG_IFD_BIN_PATH="site-local/descriptor.bin"
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CONFIG_ME_BIN_PATH="site-local/me.bin"
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CONFIG_HAVE_GBE_BIN=y
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CONFIG_BOARD_LENOVO_T430S=y
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CONFIG_NO_POST=y
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CONFIG_GBE_BIN_PATH="site-local/gbe.bin"
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CONFIG_PCIEXP_CLK_PM=y
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CONFIG_PCIEXP_L1_SUB_STATE=y
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CONFIG_LPC_TPM=y
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CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
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CONFIG_PAYLOAD_NONE=y
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CONFIG_ONBOARD_VGA_IS_PRIMARY=y
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