mirror of
https://github.com/fail0verflow/switch-coreboot.git
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52e3eecb8a
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1130 f3766cd6-281f-0410-b1cd-43a5c92072e9
58 lines
1.6 KiB
C
58 lines
1.6 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <types.h>
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#include <lib.h>
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#include <console.h>
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#include <device/pci.h>
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#include <msr.h>
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#include <io.h>
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#include <legacy.h>
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#include <device/pci_ids.h>
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#include <statictree.h>
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#include <config.h>
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void watchdog_off(void)
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{
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struct device * dev;
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unsigned long value, base;
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/* Turn off the ICH7 watchdog. */
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dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0));
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/* Enable I/O space. */
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value = pci_read_config16(dev, 0x04);
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value |= (1 << 10);
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pci_write_config16(dev, 0x04, value);
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/* Get TCO base. */
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base = (pci_read_config32(dev, 0x40) & 0x0fffe) + 0x60;
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/* Disable the watchdog timer. */
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value = inw(base + 0x08);
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value |= 1 << 11;
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outw(value, base + 0x08);
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/* Clear TCO timeout status. */
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outw(0x0008, base + 0x04);
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outw(0x0002, base + 0x06);
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printk(BIOS_DEBUG, "ICH7 watchdog disabled\n");
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}
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