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https://github.com/fail0verflow/switch-coreboot.git
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464ef4613d
all header files. This closes #40, as I think we don't need to invest time to fix this in LinuxBIOSv2, but only in LinuxBIOSv3. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@332 f3766cd6-281f-0410-b1cd-43a5c92072e9
48 lines
1.2 KiB
C
48 lines
1.2 KiB
C
#ifndef UART8250_H
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#define UART8250_H
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/* Base Address */
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#if defined(CONFIG_CONSOLE_SERIAL_COM1)
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#define TTYSx_BASE 0x3f8
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#elif defined(CONFIG_CONSOLE_SERIAL_COM2)
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#define TTYSx_BASE 0x2f8
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#else
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#define TTYSx_BASE 0x3f8
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#warning no serial port set
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#endif
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#if defined(CONFIG_CONSOLE_SERIAL_115200)
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#define TTYSx_BAUD 115200
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#elif defined(CONFIG_CONSOLE_SERIAL_57600)
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#define TTYSx_BAUD 57600
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#elif defined(CONFIG_CONSOLE_SERIAL_38400)
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#define TTYSx_BAUD 38400
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#elif defined(CONFIG_CONSOLE_SERIAL_19200)
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#define TTYSx_BAUD 19200
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#elif defined(CONFIG_CONSOLE_SERIAL_9600)
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#define TTYSx_BAUD 9600
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#else // default
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#define TTYSx_BAUD 115200
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#warning no serial speed set
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#endif
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#if ((115200%TTYSx_BAUD) != 0)
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#error Bad ttyS0 baud rate
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#endif
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#define TTYSx_DIV (115200/TTYSx_BAUD)
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/* Line Control Settings */
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#ifndef TTYSx_LCS
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/* Set 8bit, 1 stop bit, no parity */
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#define TTYSx_LCS 0x3
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#endif
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#define UART_LCS TTYSx_LCS
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unsigned char uart8250_rx_byte(unsigned base_port);
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int uart8250_can_rx_byte(unsigned base_port);
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void uart8250_tx_byte(unsigned base_port, unsigned char data);
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void uart8250_init(unsigned base_port, unsigned divisor, unsigned lcs);
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#endif /* UART8250_H */
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