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https://github.com/fail0verflow/switch-coreboot.git
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539a101e1b
hardware and have a specific size. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://coreboot.org/repository/coreboot-v3@1069 f3766cd6-281f-0410-b1cd-43a5c92072e9
133 lines
4.5 KiB
C
133 lines
4.5 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* PCI defines and function prototypes
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* Copyright 1994, Drew Eckhardt
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* Copyright 1997-1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef DEVICE_PCI_H
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#define DEVICE_PCI_H
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#include <types.h>
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#include <device/pci_def.h>
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#include <device/resource.h>
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#include <device/device.h>
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#include <device/pci_ops.h>
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#include <device/pci_rom.h>
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#include <device/pci_ids.h>
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/*
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* For more information, please consult the following manuals (look at
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* http://www.pcisig.com/ for how to get them):
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*
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* PCI BIOS Specification
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* PCI Local Bus Specification
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* PCI to PCI Bridge Specification
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* PCI System Design Guide
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*/
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/* Common pci operations without a standard interface */
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struct pci_operations {
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/* set the Subsystem IDs for the PCI device */
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void (*set_subsystem)(struct device * dev, u16 vendor, u16 device);
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};
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/* Common pci bus operations */
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struct pci_bus_operations {
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u8 (*read8)(u32 bdf, int where);
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u16 (*read16)(u32 bdf, int where);
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u32 (*read32)(u32 bdf, int where);
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void (*write8)(u32 bdf, int where, u8 val);
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void (*write16)(u32 bdf, int where, u16 val);
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void (*write32)(u32 bdf, int where, u32 val);
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int (*find)(u16 vendid, u16 devid, u32 *busdevfn);
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};
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struct pci_driver {
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struct device_operations *ops;
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u16 vendor;
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u16 device;
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};
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#define __pci_driver __attribute__ ((used,__section__(".rodata.pci_driver")))
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/** start of compile time generated pci driver array */
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extern struct pci_driver pci_drivers[];
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/** end of compile time generated pci driver array */
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extern struct pci_driver epci_drivers[];
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extern const struct device_operations default_pci_ops_dev;
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extern const struct device_operations default_pci_ops_bus;
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extern const struct pci_operations pci_dev_ops_pci;
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extern const struct pci_operations pci_bus_ops_pci;
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void pci_dev_read_resources(struct device * dev);
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void pci_bus_read_resources(struct device * dev);
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void pci_set_resources(struct device * dev);
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void pci_dev_enable_resources(struct device * dev);
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void pci_bus_enable_resources(struct device * dev);
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void pci_bus_reset(struct bus *bus);
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struct device * pci_probe_dev(struct device * dev, struct bus *bus, unsigned devfn);
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unsigned int do_pci_scan_bridge(struct device * bus, unsigned int max,
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unsigned int (*do_scan_bus)(struct bus *bus,
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unsigned min_devfn, unsigned max_devfn, unsigned int max));
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unsigned int pci_scan_bridge(struct device * bus, unsigned int max);
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unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max);
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u8 pci_moving_config8(struct device *dev, unsigned reg);
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u16 pci_moving_config16(struct device *dev, unsigned reg);
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u32 pci_moving_config32(struct device *dev, unsigned reg);
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unsigned pci_find_next_capability(struct device * dev, unsigned cap, unsigned last);
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unsigned pci_find_capability(struct device * dev, unsigned cap);
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struct resource *pci_get_resource(struct device *dev, unsigned long index);
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void pci_dev_set_subsystem(struct device * dev, u16 vendor, u16 device);
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void pci_domain_read_resources(struct device *dev);
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void ram_resource(struct device *dev, unsigned long index,
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unsigned long basek, unsigned long sizek);
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unsigned int pci_domain_scan_bus(struct device *dev, unsigned int max);
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void pci_assign_irqs(unsigned int bus, unsigned int slot,
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const unsigned char pIntAtoD[4]);
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#define PCI_IO_BRIDGE_ALIGN 4096
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#define PCI_MEM_BRIDGE_ALIGN (1024*1024)
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#define PCI_BUS_SEGN_BITS 0
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static inline const struct pci_operations *ops_pci(struct device * dev)
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{
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const struct pci_operations *pops;
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pops = 0;
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if (dev && dev->ops) {
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pops = dev->ops->ops_pci;
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}
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return pops;
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}
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static inline const struct pci_bus_operations *ops_pci_bus(struct bus *bus)
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{
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const struct pci_bus_operations *bops;
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bops = 0;
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if (bus && bus->dev && bus->dev->ops) {
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bops = bus->dev->ops->ops_pci_bus;
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}
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return bops;
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}
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#endif /* DEVICE_PCI_H */
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