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https://github.com/fail0verflow/switch-coreboot.git
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9b90a6f22b
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@951 f3766cd6-281f-0410-b1cd-43a5c92072e9
134 lines
4 KiB
C
134 lines
4 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007 Ronald G. Minnich <rminnich@gmail.com>
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* Copyright (C) 2007 coresystems GmbH
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* (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <types.h>
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#include <device/pnp.h>
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#include <io.h>
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/* Very low-level PNP functions, mostly intended for stage 0 or 1 */
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/**
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* Enter the PNP extended function mode (a.k.a. "MB PnP" or "config" mode).
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*
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* @param port The device I/O port.
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*/
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void rawpnp_enter_ext_func_mode(u16 port)
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{
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outb(0x87, port);
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outb(0x87, port);
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}
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/**
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* Exit the PNP extended function mode (a.k.a. "MB PnP" or "config" mode).
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*
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* @param port The device I/O port.
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*/
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void rawpnp_exit_ext_func_mode(u16 port)
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{
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outb(0xaa, port);
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}
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/**
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* Write an 8 bit value into a PNP configuration register.
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*
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* This is done by writing the register number to the port, and the value
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* into port + 1. This code assumes that the data port is always the
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* config-port plus 1, but luckily this is true for pretty much all devices, since
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* it is part of the standard.
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*
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* @param port The device I/O port.
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* @param reg The register number.
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* @param value The value to write into the specified register.
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*/
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void rawpnp_write_config(u16 port, u8 reg, u8 value)
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{
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outb(reg, port);
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outb(value, port + 1);
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}
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/**
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* Read an 8-bit pnp config value
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*
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* This is done by writing the register number to the port, and the value
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* into port + 1. This code assumes that the data port is always the
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* config-port plus 1, but luckily this is true for pretty much all devices, since
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* it is part of the standard.
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*
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* @param port The device I/O port.
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* @param reg The register number.
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* @returns value of the register
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*/
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u8 rawpnp_read_config(u16 port, u8 reg)
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{
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outb(reg, port);
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return inb(port + 1);
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}
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/**
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* Select a logical device.
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*
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* PNP has up to 16 logical devices. They are selected by writing the
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* logical device number (LDN) to register 0x07.
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*
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* @param port The device I/O port.
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* @param ldn The logical device (number) which should be selected.
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*/
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void rawpnp_set_logical_device(u16 port, u8 ldn)
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{
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rawpnp_write_config(port, 0x07, ldn);
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}
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/**
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* Set the enable for the logical device.
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*
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* The enable is at register 0x30. Setting bit zero enables the device.
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* Code must have selected the proper logical device number (LDN) using
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* rawpnp_set_logical_device() beforehand. If enable is non-zero, the device
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* is enabled. If enable is zero, the device is disabled.
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*
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* @param port The device I/O port.
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* @param enable Non-zero enables the device, zero disables it.
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*/
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void rawpnp_set_enable(u16 port, int enable)
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{
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rawpnp_write_config(port, 0x30, enable ? 0x1 : 0x0);
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}
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/**
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* Set the I/O base for the device.
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*
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* The I/O base is at registers 'index' and 'index + 1', since these are
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* 8 bit registers and the I/O base is 16 bits. Typical values for 'index'
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* are 0x60 or 0x62.
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*
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* Code must have selected the proper logical device (LDN) using
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* rawpnp_set_logical_device() beforehand.
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*
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* @param port The device I/O port.
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* @param index The index port.
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* @param iobase The 16 bit I/O base.
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*/
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void rawpnp_set_iobase(u16 port, u8 index, u16 iobase)
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{
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rawpnp_write_config(port, index + 0, (iobase >> 8) & 0xff); /* MSB */
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rawpnp_write_config(port, index + 1, iobase & 0xff); /* LSB */
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}
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