mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
215 lines
4.2 KiB
C
215 lines
4.2 KiB
C
#ifndef lint
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static char rcsid[] = "$Id$";
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#endif
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#include <config.h>
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#include <arch/io.h>
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#include <serial_subr.h>
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#include <printk.h>
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#include <pc80/mc146818rtc.h>
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/* Base Address */
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#ifndef TTYS0_BASE
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#define TTYS0_BASE 0x3f8
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#endif
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#ifndef TTYS0_BAUD
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#define TTYS0_BAUD 115200
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#endif
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#if ((115200%TTYS0_BAUD) != 0)
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#error Bad ttys0 baud rate
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#endif
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#define TTYS0_DIV (115200/TTYS0_BAUD)
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/* Line Control Settings */
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#ifndef TTYS0_LCS
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/* Set 8bit, 1 stop bit, no parity */
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#define TTYS0_LCS 0x3
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#endif
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#define UART_LCS TTYS0_LCS
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/* Data */
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#define UART_RBR 0x00
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#define UART_TBR 0x00
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/* Control */
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#define UART_IER 0x01
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#define UART_IIR 0x02
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#define UART_FCR 0x02
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#define UART_LCR 0x03
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#define UART_MCR 0x04
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#define UART_DLL 0x00
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#define UART_DLM 0x01
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/* Status */
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#define UART_LSR 0x05
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#define UART_MSR 0x06
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#define UART_SCR 0x07
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static inline int uart_can_tx_byte(unsigned base_port)
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{
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return inb(base_port + UART_LSR) & 0x20;
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}
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static inline void uart_wait_to_tx_byte(unsigned base_port)
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{
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while(!uart_can_tx_byte(base_port))
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;
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}
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static inline void uart_wait_until_sent(unsigned base_port)
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{
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while(!(inb(base_port + UART_LSR) & 0x40))
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;
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}
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static inline void uart_tx_byte(unsigned base_port, unsigned char data)
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{
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uart_wait_to_tx_byte(base_port);
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outb(data, base_port + UART_TBR);
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/* Make certain the data clears the fifos */
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uart_wait_until_sent(base_port);
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}
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static inline void uart_tx_bytes(unsigned base_port, char *data, unsigned len)
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{
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do {
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uart_wait_to_tx_byte(base_port);
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outb(*data, base_port + UART_TBR);
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data++;
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len--;
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} while(len);
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uart_wait_until_sent(base_port);
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}
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static inline int uart_have_rx_byte(unsigned base_port)
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{
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return inb(base_port + UART_LSR) & 0x1;
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}
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static inline void uart_enable_rx_byte(unsigned base_port)
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{
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unsigned char byte;
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/* say we are ready for a byte */
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byte = inb(base_port + UART_MCR);
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byte |= 0x02;
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outb(byte, base_port + UART_MCR);
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}
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static inline void uart_disable_rx_byte(unsigned base_port)
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{
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unsigned char byte;
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/* say we aren't ready for another byte */
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byte = inb(base_port + UART_MCR);
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byte &= ~0x02;
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outb(byte, base_port + UART_MCR);
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}
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static inline void uart_wait_for_rx_byte(unsigned base_port)
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{
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uart_enable_rx_byte(base_port);
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while(!uart_have_rx_byte(base_port))
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;
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uart_disable_rx_byte(base_port);
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}
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static inline unsigned char uart_rx_byte(unsigned base_port)
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{
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unsigned char data;
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if (!uart_have_rx_byte(base_port)) {
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uart_wait_for_rx_byte(base_port);
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}
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data = inb(base_port + UART_RBR);
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return data;
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}
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static inline unsigned long uart_rx_bytes(unsigned base_port,
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char * buffer, unsigned long size)
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{
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unsigned long bytes = 0;
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if (size == 0) {
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return 0;
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}
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if (!uart_have_rx_byte(base_port)) {
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uart_wait_for_rx_byte(base_port);
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}
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do {
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buffer[bytes++] = inb(base_port + UART_RBR);
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} while((bytes < size) && uart_have_rx_byte(base_port));
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return bytes;
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}
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inline void uart_init(unsigned base_port, unsigned divisor)
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{
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/* disable interrupts */
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outb(0x0, base_port + UART_IER);
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/* enable fifo's */
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outb(0x01, base_port + UART_FCR);
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/* Set Baud Rate Divisor to 12 ==> 115200 Baud */
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outb(0x80 | UART_LCS, base_port + UART_LCR);
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outb(divisor & 0xFF, base_port + UART_DLL);
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outb((divisor >> 8) & 0xFF, base_port + UART_DLM);
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outb(UART_LCS, base_port + UART_LCR);
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}
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void ttys0_init(void)
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{
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static unsigned char div[8]={1,2,3,6,12,24,48,96};
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int b_index=0;
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unsigned int divisor=TTYS0_DIV;
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if(get_option(&b_index,"baud_rate")==0) {
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divisor=div[b_index];
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}
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uart_init(TTYS0_BASE, divisor);
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}
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void ttys0_tx_byte(unsigned char data)
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{
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uart_tx_byte(TTYS0_BASE, data);
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}
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void ttys0_tx_bytes(char *data, unsigned len)
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{
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uart_tx_bytes(TTYS0_BASE, data,len);
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}
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unsigned char ttys0_rx_byte(void)
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{
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return uart_rx_byte(TTYS0_BASE);
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}
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unsigned long ttys0_rx_bytes(char *buffer, unsigned long size)
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{
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return uart_rx_bytes(TTYS0_BASE, buffer, size);
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}
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#ifdef PYRO_SERIAL
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/* experimental serial read stuffs */
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int iskey(void)
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{
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return uart_have_rx_byte(TTYS0_BASE);
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}
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char ttys0_rx_char(void)
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{
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return ttys0_rx_byte();
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}
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void ttys0_rx_line(char *buffer, int *len)
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{
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int pos=0;
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char chargot=0;
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while(chargot != '\r' && chargot != '\n' && pos< *len) {
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chargot = ttys0_rx_char();
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buffer[pos++] = chargot;
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}
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*len = pos-1;
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}
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#endif
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