files (trivial). Both do exactly the same, they only differ in syntax.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@183 f3766cd6-281f-0410-b1cd-43a5c92072e9
add debug printks.
make dtc put 'root' as the first_node, instead of making the last node
be the first node .... much happier in linuxbios.
sprintf is broken ... dammit. I hope someone will fix it. I've got about
another week of full-time I can spend on this and then I go back to part
time. So I'm going to need some help soon.
other fixups, and also, make the dts conform to the needs of the device
tree. So we have a domain0 and a device (0,0) that is the north.
Mostly things are working, but we're STILL not getting any memory in the
LB tables from the north. The device tree is a bitch.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@175 f3766cd6-281f-0410-b1cd-43a5c92072e9
both dest and src are long aligned or have the same offset from being long
aligned.
memcpy() and memmove() use the helper, memmove() will properly handle dest
and src overlapping.
Update comments to reflect the code changes.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@162 f3766cd6-281f-0410-b1cd-43a5c92072e9
Some minor cosmetic fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@155 f3766cd6-281f-0410-b1cd-43a5c92072e9
* exchange [u]intXX_t with [us]XX types as we agreed upon.
* drop unneeded btext.h for now
* fix license header in device/pci_ops.c
* fix printk in device/pci_ops.c
* add signed types to arch/types.h
* fix include/elf.h (remove glibc-ism)
* add appropriate copyright notice to lib/delay.c
* add pciconf.h header
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@144 f3766cd6-281f-0410-b1cd-43a5c92072e9
renamed the phase3 etc. to stuff like phase3_scan, so you can get a
rought idea what it is. The names mean more.
adding pci_device and, at the same time, showing how we can get rid of
the really ugly stuff that crept in. note you can specify ops in the
dts, which avoids the need for hideous stuff like this:
static void enable_dev(struct device *dev)
{
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
dev->ops = &pci_domain_ops;
pci_set_method(dev);
}
else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
dev->ops = &cpu_bus_ops;
}
}
So that foolishness is gone.
added delay functions.
Note that we have include/lib.h, and define all the functions in there,
instead of in lots of fiddly includes.
Brought back the enable op, once I understood it; renamed it to
something that makes sense.
I'll be on a plane soon, will continue to work, but at least you can see
what's going on here.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@139 f3766cd6-281f-0410-b1cd-43a5c92072e9
start documenting the device model -- since it is clear to me from
reading v2 that not even the v2 guys totally got it
call write_tables in stage2
fix the makefile to put stage2.o first to make sure it gets
called.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@135 f3766cd6-281f-0410-b1cd-43a5c92072e9
Remaining to be done:
PIRQ table
MP table
ACPI table
relocate the GDT reload to a sensible place -- or figure out if we even
need to bother; we're back to execute in place and the GDT is in flash
rom ==> we can leave it until we boot the payload I think.
At this point, however, we've got the basic bits to sensibly create
tables.
This has been tested and works on bochs.
It is working to a point, but still failing on qemu for reasons we don't
quite understand.
Elfboot
Found ELF candidate at offset 0
New segment addr 0x100000 size 0x21310 offset 0xc0 filesize 0x7348
(cleaned up) New segment addr 0x100000 size 0x7348 offset 0xc0
set 00100000 to 0 for 0 bytes
Copy to 00100000 from fffc3f24 for 29512 bytes
New segment addr 0x121320 size 0x48 offset 0x7420 filesize 0x48
(cleaned up) New segment addr 0x121320 size 0x48 offset 0x7420
set 00121320 to 0 for 0 bytes
Copy to 00121320 from fffcb284 for 72 bytes
Dropping non PT_LOAD segment
Dropping non PT_LOAD segment
Jumping to boot code at 0x1047c0
FILO version 0.5 (rminnich@q.ccstar.lanl.gov) Sun Feb 25 10:19:16 MST
2007
collect_sys_info: boot eax = 0xfe
collect_sys_info: boot ebx = 0xffffd4ca
collect_sys_info: boot arg = 0x1047c0
collect_linuxbios_info: NOT Searching for LinuxBIOS tables...
Can't get memory map from firmware. Using hardcoded default.
collect_sys_info: 0000000000000000-00000000000a0000
collect_sys_info: 0000000000100000-0000000002000000
collect_sys_info: RAM 32 MB
relocate: Current location: 0x1000c7-0x12142e
relocate: Relocating to 0x1fdec90-0x1fffff7... ok
Press <Enter> for default boot, or <Esc> for boot prompt...
boot: hdc1:/phase1 root=/dev/hdc1 console=ttyS0,115200
malloc_check: invalid head->prev_size: 0x0
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@133 f3766cd6-281f-0410-b1cd-43a5c92072e9
We have merged the plethora of include files into one. A given linuxbios
target architecture must support all the functions described therein.
All the structs etc. in include/tables.h are known to be
architecture-independent.
We hope this new layout is easier to folow than the old one.
Todo: Remove the LGDT code from tables writing (how did THAT get in
there ;-) and put it somewhere sane; add OFW table support. We are going
to need some nice OFW table code.
Also, the license headers should be correct in this commit.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@128 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@121 f3766cd6-281f-0410-b1cd-43a5c92072e9
elfboot.c in V3.
tested with qemu.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@115 f3766cd6-281f-0410-b1cd-43a5c92072e9
minute.
This code has been tested; we are booting filo from flash in qemu at
this point.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@114 f3766cd6-281f-0410-b1cd-43a5c92072e9
has an author.
The use of malloc is very limited in V2, and we are pretty sure we can
reduce usage of malloc to no use at all in V3.
The device code uses malloc, but that needs to be changed, so that the
device tree is allocated in a known-good-place in ram and can be
passed to other stages and payloads which may want to parse it.
The built-in-filo and vfs code in v2 both use malloc, but they will not be
brought forward to V3.
The old elfboot code used malloc, but we have changed that code so much
it no longer needs malloc.
The only remaining use of malloc is lzma, and we see no need to use such
a general mechanism for the lzma's single call to malloc.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@113 f3766cd6-281f-0410-b1cd-43a5c92072e9
Use a log2 that has an author.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@112 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@111 f3766cd6-281f-0410-b1cd-43a5c92072e9
Press <Enter> for default boot, or <Esc> for boot prompt... timed out
boot: hdc1:/phase1 root=/dev/hdc1 console=ttyS0,115200
malloc_diag: alloc: 112 bytes (3 blocks), free: 16264 bytes (1 blocks)
malloc_diag: alloc: 128 bytes (4 blocks), free: 16248 bytes (1 blocks)
file_open: dev=hdc1, path=/phase1
find_ide_controller: PCI IDE #0 not found
IDE channel 1 not found
devopen: failed to open ide
malloc_diag: alloc: 112 bytes (3 blocks), free: 16264 bytes (1 blocks)
malloc_diag: alloc: 48 bytes (2 blocks), free: 16328 bytes (1 blocks)
boot: hdc1:/phase1 root=/dev/hdc1 console=ttyS0,115200
So we've just booted our first payload in V3!
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@110 f3766cd6-281f-0410-b1cd-43a5c92072e9
FLASH. It is far simpler than before.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@109 f3766cd6-281f-0410-b1cd-43a5c92072e9
of FLASH. Since it runs out of FLASH, we have removed the need for
bounce buffer support. that in turn rips out all kinds of stuff, so it
is now simpler. We're ripping out all the checksum stuff -- lar does
that.
lar.c has some debug prints removed.
elfboot.c has some mods, but elfboot.c is going away.
cachemain.c has a few mods for using newelfboot.
Makefile reflects these changes.
Not tested, I'm going to bed though, so here you are.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@108 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@107 f3766cd6-281f-0410-b1cd-43a5c92072e9
* add license header to console/vtxprintf.c and arch/x86/serial.c
* clean out dead code from console/vtxprintf.c
* adapt arch/x86/serial.c to CONFIG_ stuff
* actually include config.h in CFLAGS
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@104 f3766cd6-281f-0410-b1cd-43a5c92072e9
We're trying to avoid the bounce buffer mess, which is really complex,
by running elfboot out of the boot block. This code includes a really
dumb allocator in elfboot which may or may not work. It basically
allocates off the elfboot() stack.
This builds, but elfboot is not tested. That's next.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@102 f3766cd6-281f-0410-b1cd-43a5c92072e9
hell.
more fixes to elfboot.c. more coming.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@98 f3766cd6-281f-0410-b1cd-43a5c92072e9
Some updates to the docs, but these will change more.
add memcmp. Crude implementation, but it really does not matter.
add compute_ip_checksum.c
mods to elfboot. Thanks to our new design, BOUNCE BUFFERS ARE DEAD. Yee
ha!
updates to makefile
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@96 f3766cd6-281f-0410-b1cd-43a5c92072e9
* remove some warnings
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@95 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@94 f3766cd6-281f-0410-b1cd-43a5c92072e9
* add generic lib.h header for lib/ prototypes
* fix some prototypes
* put back return value parsing of stage2
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@91 f3766cd6-281f-0410-b1cd-43a5c92072e9
directories in include, since having all those directories has obscured
understanding.
Add elfboot.c to lib. Same argument, it is not in boot, it is in lib,
since fewer directories is better.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@89 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@78 f3766cd6-281f-0410-b1cd-43a5c92072e9
changes. There is still debug crap in lar.c which will be pulled soon.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@75 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@71 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@70 f3766cd6-281f-0410-b1cd-43a5c92072e9
accordance to the newboot document:
* reset vector (16 bytes)
* vpd (240bytes)
* boot block (8k - 256b)
* lar archive (256-8 k)
The boot block is kind of simple, still. It enables pmode, car, and
starts looking for an initram module in the lar archive.
Note: This doesnt do much at the moment,
as gas seems to produce buggy code in init.S.
Take this as a suggestion of how it might work and please provide
patches fixing it and bringing it into shape.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@62 f3766cd6-281f-0410-b1cd-43a5c92072e9
* fix arch/io.h to use consistent types
* add compression code and start integration into Kconfig
* update to newer version of Kconfig, and rename some occurences
of "Linux" to "LinuxBIOS"
* set up Make framework to create linuxbios.rom
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G Minnich <rminnich@lanl.gov>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@55 f3766cd6-281f-0410-b1cd-43a5c92072e9
