Add a nasty warning if one of the cases triggers because that should
not happen. We should fix the cases where the warning triggers.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@631 f3766cd6-281f-0410-b1cd-43a5c92072e9
code boots and works on qemu and
alix1c. It represents a huge change and a huge improvement. There are a
few fixes left to do, which
will come once this is in.
This change started out easy: get the device IDs OUT of the the dts, and
into one place. We
decided the device IDs should be in the constructors ONLY. To make a
long story short, that just did
not work out, and it revealed a flaw in the design. The result?
- no more ids in the various dts files.
- the constructor struct is gone -- one less struct, nobody liked the
name anyway
- the device_operations struct now includes the device id.
- constructor property no longer used; use device_operations instead.
- lpc replaced with ioport
All the changes below stem from this "simple" change.
I am finding this new structure much easier to work with. I hope we're
done
on this for real, however!
TODO:
1. Change limitation in dtc that makes it hard to use hex in pci@
notation.
Now for the bad news. Sometime today, interrupts or io or something
stopped working between r596 and r602 -- but I did no commits at
that point. So something has gone wrong, but I don't think it's this
stuff.
I did try a build of HEAD, and it fails really, really badly. Much
more badly than this fails, so I think this commit is only going
to improve things. It does work fine on qemu, fails on alix1c,
so I suspect one of today's "clean up commits" broke something.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@603 f3766cd6-281f-0410-b1cd-43a5c92072e9
CONFIG_* == 1. If those variables are set, they will always be 1.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@599 f3766cd6-281f-0410-b1cd-43a5c92072e9
from v2 to install them. Linux boots fine and all interrupts
seem to work correctly -- the network comes up, USB hot plug works,
I can mount the USB disk, etc.
To enable pirq tables for a given mainboard, simply add the
select PIRQ_TABLE (see below) to the Kconfig for that board.
Again, this code builds and boots linux on the alix1c.
I think, with this change, we are very close to moving ALL LX boards to
v3 and deprecating v2. The major remaining fix is to add an empty LAR
entry to fill empty space in LAR and speed up the LAR file search
process.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Index: include/tables.h
Add prototype, conditioned on CONFIG_PIRQ_TABLE
Index: util/x86emu/vm86.c
Comment out 'debug trap' code that scribbles vectors at 0x4000.
I don't know why this is here, but I'd like to leave it #if'ed out --
somebody, at some point, thought we needed it. To reenable, we will need
to move stage2 code or these magic vectors.
Index: arch/x86/Makefile
Add support for conditional compilation of pirq support code.
Index: arch/x86/pirq_routing.c
Add this file from v2.
Index: arch/x86/archtables.c
Add call to write_pirq_routing_table (controlled by #ifdef
CONFIG_PIRQ_TABLE)
Index: arch/x86/Kconfig
Add new config variable: PIRQ_TABLE
Index: device/device.c
Fix some trivial bugs.
Index: mainboard/pcengines/alix1c/Makefile
Add pirq table code for stage2
Index: mainboard/pcengines/alix1c/dts
Modify dts to properly set southbridge variables
Index: mainboard/pcengines/alix1c/irq_tables.c
Add code from v2 for the alix1c.
Index: mainboard/pcengines/Kconfig
Add 'select PIRQ_TABLE'
Index: include/arch/x86/pirq_routing.h
Add include file from v2.
Remove all the SLOTCOUNT nonsense. This hack was only needed
for a very early version of gcc 3.x, where they screwed up the
creation of struct members that used the [] syntax for variable-length
array at the end of the struct.
Index: include/device/pci.h
Add prototype
git-svn-id: svn://coreboot.org/repository/coreboot-v3@582 f3766cd6-281f-0410-b1cd-43a5c92072e9
them just use the default.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@579 f3766cd6-281f-0410-b1cd-43a5c92072e9
released new-model VSA code.
Changes:
Index: util/dtc/flattree.c
Add an ID entry for apic properties.
Index: northbridge/amd/geodelx/apic
This is a new dts for the northbridge used as an APIC.
Index: northbridge/amd/geodelx/pci
This is a new dts for the northbridge used as a PCI device.
Index: northbridge/amd/geodelx/geodelx.c
Fix a non-obvious bug: we had set phase3 scan bus for both the
domain AND the PCI device, which is a mistake: can't scan from the
PCI device too.
Index: northbridge/amd/geodelx/domain
This is a new dts for the northbridge used as an pci domain.
Created via svn move dts domain
Index: device/pci_device.c
If there are leftover devices, it is now a warning, not an error,
since there are
some no-pci devices in the tree now. For future: only complain about
leftover PCI devices ...
Index: device/device.c
make devcnt a global and initialize it in init_dev. Add a debug printk.
Index: mainboard/pcengines/alix1c/dts
Add an 'apic' entry for the mainboard. This actually looks pretty clean
to me, the way it went in.
Index: northbridge/amd/geodelx/vsmsetup.c
Delete all pcibios int support, no longer needed for VSA.
Please note that this patch includes Carl-Daniel's improvements
below, which I have Ack-ed.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
A few minor comments. It would be great if you could address them before
committing.
northbridge/amd/geodelx/domain is a copy of northbridge/amd/geodelx/dts.
You probably want to use "svn mv" for that because it preserves history
and the old file was probably intended to have been moved, not copied.
northbridge/amd/geodelx/vsmsetup.c:247: warning: ‘biosint’ defined but
not used
Since the new VSA does not use BIOSINT services anymore, deleting
biosint and related functions from vsmsetup.c would shrink vsmsetup.c by
one fourth. Patch follows (could you merge it into your patch?):
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@571 f3766cd6-281f-0410-b1cd-43a5c92072e9
- I left LB_TAG_ intact because they are used by the payloads
- file renames are still missing. see next commit
- some lb_ renames might be missing. feel free to provide patches.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@564 f3766cd6-281f-0410-b1cd-43a5c92072e9
Change the ID constants so they are more useful for debugging.
Instead of simple 1,2,3 they now are a 4-byte value which can be more
useful when looking at memory with a debugger. Lots of variables can be
'1', but fewer variables will match to 'PCID'.
include/device/pci.h:
Include pci_ids.h in pci.h
device/device.c: remove silly comment. Change memcpy to struct assign, this makes it possible
for the C compiler to do type checking. Add assign for the dev->id.
flattree.c: Support the use of 'domainid' and 'pciid' in the per-chip dts. These IDs will be assigned
to the static tree device struct. In conjunction with the earlier patch, this change removes the need
for users to assign the ops struct member in the dts by hand, as it is done in the qemu port today.
The ops struct member will automatically be assigned by the dev_init function, which is run
in stage2 before any actual device code is run. (This change to dev_init was in the previous patch).
Added two comments that document what is going on.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@557 f3766cd6-281f-0410-b1cd-43a5c92072e9
I just uncovered this problem while trying to get the lx going.
The symptom was that the northbridge ops were never getting run,
in particular the phase 2 ops for the geodelx were not running. The
reason was that the ops struct member for the device was not set.
How is the ops struct member set?
Currently, the ops vector for a static device (i.e. a device created from the
dts) has to be set by hand, as in mainboard/emulation/qemu-x86/dts:
domain0 {
/config/("northbridge/intel/i440bxemulation");
ops = "i440bxemulation_pcidomainops";
This requirement is ridiculous (it's my fault). If we know the part,
and have the dts, we should not have to explicitly name the ops. In fact the
constructors array, defined at the end of the various device files, makes
searching for an ops struct for a dynamic device automatic. We should
support this automatic behavior for static devices too.
Given the function find_constructor
in device/device.c, why don't we just use that? The problem is that we did
not set up the device struct to include a device id, just a device path, and
find_constructor requires a device_id -- which makes sense, I hope,
as the path is its pci path (e.g. 0:1.0) and the constructors are defined by the
device id (i.e. it is the same constructor for a given part, no matter how many
of the part we have).
So, as a start to fixing this limitation (this is going to take several patches),
I've done the following:
1. add a struct device_id to the device struct.
2. extended the dev_init code in device/device.c -- this is the first function
called from lib/stage2.c -- to find a constructor for the dev->id and, if
found, set dev->ops to it.
Result: for static devices with the id set, the ops pointer will be set
automatically. Coreboot builds fine with this change.
The next change will be to add dtc commands to set ids.
Currently, we have commands like pcipath, pcidomain, etc.;
the new commands will look like pciid, domainid, etc. Once we have these
commands, we will have made it possible to set ops automatically. We
can just set the ids in the device dts file, and users will never have to
see any of this complication.
The final change will be a bit more complicated. Right now, if you look in,
e.g., northbridge/amd/geodelx/dts, you'll see that we have one dts, but
the northbridge plays three roles. We can't easily contain those three
roles in one dts (I am open to suggestions showing I am wrong).
I am going to propose that we have more than one dts file
in a directory, so instead of
northbridge/amd/geodelx/dts
we would have
northbridge/amd/geodelx/dtsdomain
northbridge/amd/geodelx/dtsapic
northbridge/amd/geodelx/dtspci
so that we could set the variables for each of these individual components.
There is no need to split geodelx.c into three .c files, however.
Finally, I will be removing the archaic vendor and device unsigned's from
the device struct in future, but as I say, I am trying to stage these changes
to keep them understandable.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@556 f3766cd6-281f-0410-b1cd-43a5c92072e9
numeric constants and #defines for such constants. Since grepping the
tree shouldn't be necessary to find a POST code and we already have
too many duplicated POST codes, gather almost all of them in a common
header file.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@549 f3766cd6-281f-0410-b1cd-43a5c92072e9
an artifact from the time when we needed stage2 phase 1 code to make
printk work.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@512 f3766cd6-281f-0410-b1cd-43a5c92072e9
differentiate between identically named objects during boot.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@501 f3766cd6-281f-0410-b1cd-43a5c92072e9
conformant, working) %llx in printk/printf.
While I'm at it, affected lines with 271 characters can be broken into
smaller chunks.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@479 f3766cd6-281f-0410-b1cd-43a5c92072e9
x86 config). This was tested with gcc 4.1.0 on x86 and gcc 4.2.1 on x86_64.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@466 f3766cd6-281f-0410-b1cd-43a5c92072e9
Also, make align_up()/align_down() non-static as they are useful
even outside of device/device_util.c.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@437 f3766cd6-281f-0410-b1cd-43a5c92072e9
* drop silly code when not using SMP
* fix device/device.c
* drop spinlock_t, use struct spinlock instead.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
one kitten died already! ;-)
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@429 f3766cd6-281f-0410-b1cd-43a5c92072e9
* make constructor an initializer.
* fix memory leak/code flow error in current code
* add spinlocking
* drop malloc and use new_device for device allocation instead.
* add CONFIG_SMP as it is needed by spinlocks and soon other stuff.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@418 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@405 f3766cd6-281f-0410-b1cd-43a5c92072e9
- Everything in include/cpu/generic/x86/arch/* goes into
include/arch/x86 now.
- include/cpu/generic/x86/div64.h moves into include/arch/x86, too.
- The former include/cpu/generic/x86/arch/elf.h moved to
include/arch/x86/archelf.h, as elf.h already exists in include/
and we must prevent a name clash.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@314 f3766cd6-281f-0410-b1cd-43a5c92072e9
get rid of a directory which only contains a single file, and
at the same time simplify the #includes and their hierarchies.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@313 f3766cd6-281f-0410-b1cd-43a5c92072e9
Various additional cosmetic fixes and corrected typos (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@297 f3766cd6-281f-0410-b1cd-43a5c92072e9
Self-acked as this was already approved in v2.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@285 f3766cd6-281f-0410-b1cd-43a5c92072e9
* include cleanup. We don't provide stdint.h, so use arch/types.h
instead.
* drop some unused variables
* fix comment style in some headers to match the template
* Fix the loglevel of some debugging output.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@275 f3766cd6-281f-0410-b1cd-43a5c92072e9
* fix up device specific code to honour those switches
* quoting fix for xcompile
* drop VGA_CONSOLE as it's not really useful for debugging purposes.
VGA is only set up very late in the boot process, when everything
critical in LinuxBIOS has already been initialized. If LinuxBIOS
fails, you will never see this on the console.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@269 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@264 f3766cd6-281f-0410-b1cd-43a5c92072e9
This tree shows the new model. It demonstrates the constructor array
in use, for devices that are and are not specified in the dts. It
introduces a new generic structure, device_id, analogous to
device_path, which can describe all the types of device IDs we have.
It shows a way to set up arrays of structs, in the dts, for the
constructors, so we avoid ldscript hacks.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@233 f3766cd6-281f-0410-b1cd-43a5c92072e9
Add "(LB) " to all log messages to differentiate them visually
from the rest of the boot messages. This is similar to what
Xen does when booting (it prefixes all log messages with "(XEN) ").
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@209 f3766cd6-281f-0410-b1cd-43a5c92072e9
add debug printks.
make dtc put 'root' as the first_node, instead of making the last node
be the first node .... much happier in linuxbios.
sprintf is broken ... dammit. I hope someone will fix it. I've got about
another week of full-time I can spend on this and then I go back to part
time. So I'm going to need some help soon.
other fixups, and also, make the dts conform to the needs of the device
tree. So we have a domain0 and a device (0,0) that is the north.
Mostly things are working, but we're STILL not getting any memory in the
LB tables from the north. The device tree is a bitch.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@175 f3766cd6-281f-0410-b1cd-43a5c92072e9
Phase 1: done
Phase 2: early setup ...
Phase 2: done
Phase 3: Enumerating buses...
qemu-x86 enable_dev done
dev_phase3_scan: scanning Root Device
scan_static_bus for root(Root Device)
cpus: Unknown device path type: 0
cpus() enabled
i440bxemulation_enable_dev:
i440bxemulation_enable_dev: DONE
northbridge_intel_i440bxemulation() enabled
northbridge_intel_i440bxemulation() scanning...
dev_phase3_scan: scanning
pci_scan_bus start
PCI: pci_scan_bus for bus 00
PCI: scan devfn 0x0 to 0xff
PCI: devfn 0x0
PCI: pci_scan_bus pci_scan_get_dev returns dev <NULL>
Change dts compiler to emit a new struct member, dtsname, for devices,
so we can get actual useful names for things.
Several mods and printks added.
printk(BIOS_SPEW
gives no output for reasons I don't understand.
Next in line is bringing back v2 support for pci, but not doing it the
way v2 does it.
note the cpus() printk above. cpus don't have a valid path yet.
We still need to work out the dts syntax for systems with multiple links
(opteron)
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@163 f3766cd6-281f-0410-b1cd-43a5c92072e9
Also added comments.
A big change is in the dts. In OFW trees, the hierarchy seems to be:
/root/cpu/northbridge
south
other pci
note that the north is in the hierarchy under the south. This hierarchy
makes no sense on systems with a shared frontside bus, or at least I
don't see how it can. In those systems, it's easier to think about
the CPUs AND northbridges as children of the front side bus.
in LinuxBIOS, it has always been this:
/root/cpu/whatever
/root/northbridge/
south
other pci
There have been many discussions over how it ought to be, for 8 years
now, and we've always come back to how LB does it. So I have changed the
dts for qemu for now to match LB's way of doing things. Note that the
new system is flexible enough that, on K8, we CAN do things as above:
/cpu@0/amd8knorthbridge/etc.
/cpu@1/amd8knorthbridge/etc.
But on qemu, for now, the root is the mainboard, and the CPU and
northbridge are siblings.
I've added some informational printks, cleaned up pci_ops, and done
other things so that it builds and all seems to work -- until it hangs
hard in enumeration in i440bx ...
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@160 f3766cd6-281f-0410-b1cd-43a5c92072e9
renamed the phase3 etc. to stuff like phase3_scan, so you can get a
rought idea what it is. The names mean more.
adding pci_device and, at the same time, showing how we can get rid of
the really ugly stuff that crept in. note you can specify ops in the
dts, which avoids the need for hideous stuff like this:
static void enable_dev(struct device *dev)
{
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
dev->ops = &pci_domain_ops;
pci_set_method(dev);
}
else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
dev->ops = &cpu_bus_ops;
}
}
So that foolishness is gone.
added delay functions.
Note that we have include/lib.h, and define all the functions in there,
instead of in lots of fiddly includes.
Brought back the enable op, once I understood it; renamed it to
something that makes sense.
I'll be on a plane soon, will continue to work, but at least you can see
what's going on here.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@139 f3766cd6-281f-0410-b1cd-43a5c92072e9
more comprehensible. tested on bochs.
Some documentation on what is going on in stage2
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@136 f3766cd6-281f-0410-b1cd-43a5c92072e9
start documenting the device model -- since it is clear to me from
reading v2 that not even the v2 guys totally got it
call write_tables in stage2
fix the makefile to put stage2.o first to make sure it gets
called.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@135 f3766cd6-281f-0410-b1cd-43a5c92072e9
* small warnings fixes
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@93 f3766cd6-281f-0410-b1cd-43a5c92072e9
