Due to some problems with PCI transactions, Geode LX needs the ROM cache properties to be write-serialize + cache disabled by runtime. More details below.
Add mainboard_pre_payload() call to each mainboard as the final coreboot function before the payload is called by stage1.
Note that this patch also grows the bootblock from 16K to 20K to make room for mainboard_pre_payload().
"The problem is a transaction depth issue and bottlenecks inside the GX
and LX that go across PCI. The conditions are very complicated but it
comes down to we need write serialization for writes to PCI. If you
look in the data book you can't have write serialization and the cache
enabled on a given area. During coreboot we don't have to worry about
a write or a PCI bus master so I think we can enable caching the ROM.
After coreboot we can't be sure what will happen in the system so we
need to set it up to be safe. For example flashrom just clears the
write protect bit. If the cache were enabled (no write serialization)
and flashrom was writing the ROM we would be in a precarious position.
A PCI bus master doing a read or a write that has a hit on a tag
would cause enough bottleneck conditions that it might hit the bug. We
could change flashrom but that doesn't help other tools. We need to
leave the system in a safe state. Also, caching the ROM after it is no
longer used doesn't make much sense. So, we need a call just before
the payload runs to clean up the system."
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@573 f3766cd6-281f-0410-b1cd-43a5c92072e9
Clean up lib.h prototypes.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@568 f3766cd6-281f-0410-b1cd-43a5c92072e9
- I left LB_TAG_ intact because they are used by the payloads
- file renames are still missing. see next commit
- some lb_ renames might be missing. feel free to provide patches.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@564 f3766cd6-281f-0410-b1cd-43a5c92072e9
is running the VSA in the geode lx northbridge.
It builds but is not tested.
lar.h: make LAR functions SHARED
lar.c: make process_file non-static (i.e. global)
vsmsetup.c: modify to use LAR functions.
stage1.c: new function, init_archive, which is SHARED and will set up
the initial archive struct.
Note that some work remains. The use of unsigned longs and unsigned
shorts should be changed to u32/u16 as Carl-Daniel has pointed out,
Because this change requires changes elsewhere I am not including them
in this patch.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@561 f3766cd6-281f-0410-b1cd-43a5c92072e9
Remove old vendor,device struct members since we are now using the
device_id struct.
Change declaration of dev_find_device to use device_id struct.
device/device_util.c
Change dev_find_device to use device_id struct instead of vendor, device
parameters.
Add convenience function, dev_find_pci_device, to make it easier for
users.
device/pci_device.c
Change uses of dev->vendor and dev->device to dev->id.
Change prints of dev->vendor, dev->device to use the
dev_id_string function.
device/pci_rom.c
Change uses of dev->vendor and dev->device to dev->id.
southbridge/amd/cs5536/cs5536.c
Change uses of dev_find_device to dev_find_pci_device
southbridge/amd/cs5536/dts
Add pciid of the cs5536
northbridge/amd/geodelx/dts
add pciid of the geodelx northbridge.
util/x86emu/vm86.c
Change uses of dev_find_device to dev_find_pci_device
With these changes, the chipsetinit function now finds the southbridge
in the static tree, which is the first time this has worked in v3.
This success in turn means that the chipsetinit code is running for the
first time.
We are still failing in "Finding PCI configuration type"
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@558 f3766cd6-281f-0410-b1cd-43a5c92072e9
Change the ID constants so they are more useful for debugging.
Instead of simple 1,2,3 they now are a 4-byte value which can be more
useful when looking at memory with a debugger. Lots of variables can be
'1', but fewer variables will match to 'PCID'.
include/device/pci.h:
Include pci_ids.h in pci.h
device/device.c: remove silly comment. Change memcpy to struct assign, this makes it possible
for the C compiler to do type checking. Add assign for the dev->id.
flattree.c: Support the use of 'domainid' and 'pciid' in the per-chip dts. These IDs will be assigned
to the static tree device struct. In conjunction with the earlier patch, this change removes the need
for users to assign the ops struct member in the dts by hand, as it is done in the qemu port today.
The ops struct member will automatically be assigned by the dev_init function, which is run
in stage2 before any actual device code is run. (This change to dev_init was in the previous patch).
Added two comments that document what is going on.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@557 f3766cd6-281f-0410-b1cd-43a5c92072e9
I just uncovered this problem while trying to get the lx going.
The symptom was that the northbridge ops were never getting run,
in particular the phase 2 ops for the geodelx were not running. The
reason was that the ops struct member for the device was not set.
How is the ops struct member set?
Currently, the ops vector for a static device (i.e. a device created from the
dts) has to be set by hand, as in mainboard/emulation/qemu-x86/dts:
domain0 {
/config/("northbridge/intel/i440bxemulation");
ops = "i440bxemulation_pcidomainops";
This requirement is ridiculous (it's my fault). If we know the part,
and have the dts, we should not have to explicitly name the ops. In fact the
constructors array, defined at the end of the various device files, makes
searching for an ops struct for a dynamic device automatic. We should
support this automatic behavior for static devices too.
Given the function find_constructor
in device/device.c, why don't we just use that? The problem is that we did
not set up the device struct to include a device id, just a device path, and
find_constructor requires a device_id -- which makes sense, I hope,
as the path is its pci path (e.g. 0:1.0) and the constructors are defined by the
device id (i.e. it is the same constructor for a given part, no matter how many
of the part we have).
So, as a start to fixing this limitation (this is going to take several patches),
I've done the following:
1. add a struct device_id to the device struct.
2. extended the dev_init code in device/device.c -- this is the first function
called from lib/stage2.c -- to find a constructor for the dev->id and, if
found, set dev->ops to it.
Result: for static devices with the id set, the ops pointer will be set
automatically. Coreboot builds fine with this change.
The next change will be to add dtc commands to set ids.
Currently, we have commands like pcipath, pcidomain, etc.;
the new commands will look like pciid, domainid, etc. Once we have these
commands, we will have made it possible to set ops automatically. We
can just set the ids in the device dts file, and users will never have to
see any of this complication.
The final change will be a bit more complicated. Right now, if you look in,
e.g., northbridge/amd/geodelx/dts, you'll see that we have one dts, but
the northbridge plays three roles. We can't easily contain those three
roles in one dts (I am open to suggestions showing I am wrong).
I am going to propose that we have more than one dts file
in a directory, so instead of
northbridge/amd/geodelx/dts
we would have
northbridge/amd/geodelx/dtsdomain
northbridge/amd/geodelx/dtsapic
northbridge/amd/geodelx/dtspci
so that we could set the variables for each of these individual components.
There is no need to split geodelx.c into three .c files, however.
Finally, I will be removing the archaic vendor and device unsigned's from
the device struct in future, but as I say, I am trying to stage these changes
to keep them understandable.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@556 f3766cd6-281f-0410-b1cd-43a5c92072e9
numeric constants and #defines for such constants. Since grepping the
tree shouldn't be necessary to find a POST code and we already have
too many duplicated POST codes, gather almost all of them in a common
header file.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@549 f3766cd6-281f-0410-b1cd-43a5c92072e9
return from disable_car.
- Move the cache as ram memory to 0x80000 instead of 0xc8000, as the C
range is really tricky to get right :-)
- Modify the geode disable_car to ensure the cache is flushed to ram on
the wbinvd.
With these changes, I get a payload loaded.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@546 f3766cd6-281f-0410-b1cd-43a5c92072e9
use it.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@544 f3766cd6-281f-0410-b1cd-43a5c92072e9
available to C.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@543 f3766cd6-281f-0410-b1cd-43a5c92072e9
into lib/northbridgelib.c.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@534 f3766cd6-281f-0410-b1cd-43a5c92072e9
(which was committed) was unfortunately generated from the wrong tree.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@531 f3766cd6-281f-0410-b1cd-43a5c92072e9
lib/lar.c:load_file_segments() and greatly simplify arch/x86/stage1.c
code as a result. While I'm at it, improve the LAR segmentation
abstraction. Stage 1 code should not have to care about internal
representation of segments, that knowledge belongs into lib/lar.c.
Constification of most function parameters in lib/lar.c led to a few
other now obvious code removals.
Build tested and runtime tested in Qemu.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@530 f3766cd6-281f-0410-b1cd-43a5c92072e9
in a later patch make sure all dram
functions call spd_read_byte, not smbus_read_byte.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@526 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@519 f3766cd6-281f-0410-b1cd-43a5c92072e9
to have code in header files.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@518 f3766cd6-281f-0410-b1cd-43a5c92072e9
had _SHARED defined during compilation, each of them would contain an
assignment of stage0_printk to *printk. During linking, this caused
errors as multiple definitions of printk existed.
Make sure _SHARED alone gives you only the printk prototype, and iff
_MAINOBJECT is defined as well, include the assignment.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@516 f3766cd6-281f-0410-b1cd-43a5c92072e9
post_code.c (thus drop it from console.h).
Instead, have console.h #include post_code.h and drop other
explicit #includes of post_code.h in the code; console.h is already
included in pretty much every file.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@513 f3766cd6-281f-0410-b1cd-43a5c92072e9
dereference or worse) in case the archive length is exactly
sizeof(struct lar_header). Such an archive is invalid because the
filename directly after the LAR header is always dereferenced and has to
be at least 1 byte in the "empty filename" case (only terminating \0).
Improve LAR code documentation and reorder variables in one assignment
to make the code more obvious and readable. This will help people
understand what the code does when they look at it half a year from now.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@506 f3766cd6-281f-0410-b1cd-43a5c92072e9
This fixes for example printk calls from initram code.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@505 f3766cd6-281f-0410-b1cd-43a5c92072e9
differentiate between identically named objects during boot.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@501 f3766cd6-281f-0410-b1cd-43a5c92072e9
example to access the device list from Open Firmware.
Signed-off-by: Jens Freimann <jens@freimann.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@500 f3766cd6-281f-0410-b1cd-43a5c92072e9
device tree can be created from data in struct device.
Signed-off-by: Jens Freimann <jens@freimann.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@499 f3766cd6-281f-0410-b1cd-43a5c92072e9
Change lib/lar.c to use strncmp() for magic check. Current code
depends on that the len field will never hold a value bigger than
0xffffff, which is a working assumption given current flash sizes, but
my next patch might affect this.
Signed-off-by: Alex Beregszaszi <alex@rtfs.hu>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@496 f3766cd6-281f-0410-b1cd-43a5c92072e9
Remove a broken proto from a c file.
Fix protos etc. per uwe's request for const where it made
sense.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@485 f3766cd6-281f-0410-b1cd-43a5c92072e9
These changes extend the larchive structure, and
add a Kconfig EXPERT option to enable the 'no elf' mode.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@483 f3766cd6-281f-0410-b1cd-43a5c92072e9
- Simplify lots of code, especially msr-related code.
- Move struct msrinit declaration into msr.h as we use it quite often
and there's no use to duplicate it again and again in each file.
- Remove unrequired variable usage (e.g. numEnabled, msrnum, val, port).
- Remove useless comments.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Marc Jones <marc.jones@amd.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@464 f3766cd6-281f-0410-b1cd-43a5c92072e9
* statically link linuxbios.initram for now (depends on printk, post_code
and die)
* greatly simplify all makefiles by creating a global Rules.make
* use $(dir $@) in Makefiles instead of absolute paths for mkdir..
* clean up Makefiles by calling components' code locally instead of in the
Makefile. (Remember: one day, no code per mainboard)
* unconditionally create .xcompile in case it changed
* add NM to xcompile
* create $(obj)/linuxbios.map with all symbols of all stages
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@463 f3766cd6-281f-0410-b1cd-43a5c92072e9
- Use 'static' for functions and structs which are not meant to be public.
- Use 'const' for variables which are not meant to be modified.
- Move some prototypes into legacy.h where they belong.
- Drop prototypes for non-existing functions.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Marc Jones <marc.jones@amd.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@460 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@459 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@458 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@457 f3766cd6-281f-0410-b1cd-43a5c92072e9
- support decompression in the lar loader
- support compressed payloads in stage1
(copies payloads to 0x60000 unconditionally)
- hook up decompressors in Makefile
- disable compression for option_table and initram
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@452 f3766cd6-281f-0410-b1cd-43a5c92072e9
- PCI_VENDOR_ID_CIRRUS
- PCI_DEVICE_ID_CIRRUS_5446
Some minor cosmetic fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@447 f3766cd6-281f-0410-b1cd-43a5c92072e9
Also, make align_up()/align_down() non-static as they are useful
even outside of device/device_util.c.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@437 f3766cd6-281f-0410-b1cd-43a5c92072e9
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@435 f3766cd6-281f-0410-b1cd-43a5c92072e9
Use legacy.h PIT defines in Geode code.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@433 f3766cd6-281f-0410-b1cd-43a5c92072e9
header. Some other minor fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@431 f3766cd6-281f-0410-b1cd-43a5c92072e9
* drop silly code when not using SMP
* fix device/device.c
* drop spinlock_t, use struct spinlock instead.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
one kitten died already! ;-)
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@429 f3766cd6-281f-0410-b1cd-43a5c92072e9
the Linux kernel (as far as possible). The code is a lot simpler
and shorter now.
Also, add cpu_relax() (which is also part of the Linux file) which
could be useful for busy-loops (but is currently not used).
Drop the cpu_relax() from spinlock.h as it's not spinlock related in any way.
The code builds, and works in QEMU, but is not tested on hardware.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@423 f3766cd6-281f-0410-b1cd-43a5c92072e9
