Commit graph

8 commits

Author SHA1 Message Date
Uwe Hermann
31fa35e06a Run indent on all the code in device/ to fix the coding style.
Various additional cosmetic fixes and corrected typos (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@297 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-05-01 20:52:09 +00:00
Uwe Hermann
78ae9963e4 Sync over the copyright headers from src/device/* in LinuxBIOSv2.
Self-acked as this was already approved in v2.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@285 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-04-22 19:24:15 +00:00
Uwe Hermann
aa01c41f42 A bunch of small cosmetic improvement of the printk() calls (trivial).
Add "(LB) " to all log messages to differentiate them visually
from the rest of the boot messages. This is similar to what
Xen does when booting (it prefixes all log messages with "(XEN) ").

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@209 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-03-07 21:07:13 +00:00
Ronald G. Minnich
637e4588be add pci ops so that we can do something.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@172 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-03-02 18:17:02 +00:00
Ronald G. Minnich
b520f3201e Some serious changes to get qemu working with pci.
Also added comments. 

A big change is in the dts. In OFW trees, the hierarchy seems to be:
/root/cpu/northbridge 
          south
          other pci

note that the north is in the hierarchy under the south. This hierarchy
makes no sense on systems with a shared frontside bus, or at least I
don't see how it can. In those systems, it's easier to think about 
the CPUs AND northbridges as children of the front side bus. 

in LinuxBIOS, it has always been this:
/root/cpu/whatever
/root/northbridge/
                  south
                  other pci

There have been many discussions over how it ought to be, for 8 years
now, and we've always come back to how LB does it. So I have changed the 
dts for qemu for now to match LB's way of doing things. Note that the
new system is flexible enough that, on K8, we CAN do things as above:
/cpu@0/amd8knorthbridge/etc.
/cpu@1/amd8knorthbridge/etc.

But on qemu, for now, the root is the mainboard, and the CPU and
northbridge are siblings. 

I've added some informational printks, cleaned up pci_ops, and done
other things so that it builds and all seems to work -- until it hangs
hard in enumeration in i440bx ...

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@160 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-28 19:17:59 +00:00
Stefan Reinauer
be31c46733 This one is going to break all your changes, but fix up a lot of code.
* exchange [u]intXX_t with [us]XX types as we agreed upon.
* drop unneeded btext.h for now
* fix license header in device/pci_ops.c
* fix printk in device/pci_ops.c
* add signed types to arch/types.h
* fix include/elf.h (remove glibc-ism)
* add appropriate copyright notice to lib/delay.c
* add pciconf.h header


Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@144 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-27 14:03:20 +00:00
Ronald G. Minnich
7513bfdb03 Lots of changes here, build broken, but people need to see this.
renamed the phase3 etc. to stuff like phase3_scan, so you can get a
rought idea what it is. The names mean more. 

adding pci_device and, at the same time, showing how we can get rid of
the really ugly stuff that crept in. note you can specify ops in the
dts, which avoids the need for hideous stuff like this:
static void enable_dev(struct device *dev)
{
        /* Set the operations if it is a special bus type */
        if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
                dev->ops = &pci_domain_ops;
                pci_set_method(dev);
        }
        else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
                dev->ops = &cpu_bus_ops;
        }
}

So that foolishness is gone. 

added delay functions. 

Note that we have include/lib.h, and define all the functions in there,
instead of in lots of fiddly includes. 

Brought back the enable op, once I understood it; renamed it to
something that makes sense. 


I'll be on a plane soon, will continue to work, but at least you can see
what's going on here. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@139 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-27 06:02:52 +00:00
Stefan Reinauer
791e590dea * rename devices to device for consistency
* fix malloc.c warnings
* add PCI_BUS_SEGN_BITS to pci.h


Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@92 f3766cd6-281f-0410-b1cd-43a5c92072e9
2007-02-23 11:23:37 +00:00
Renamed from devices/pci_ops.c (Browse further)