Commit graph

7 commits

Author SHA1 Message Date
Carl-Daniel Hailfinger
54d59cf82c Fix missing indirection for CONFIG_PCI_64BIT_PREF_MEM. That config still
does not compile, but this needed fixing anyway.

Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@1132 f3766cd6-281f-0410-b1cd-43a5c92072e9
2009-02-13 11:00:21 +00:00
Myles Watson
72c2e85313 This patch changes all occurrences of pci_dev_set_resources ->
pci_set_resources.  There is no matching pci_bus_set_resources, so it's
confusing to see the dev function in the bus structures.
 
Signed-off-by: Myles Watson <mylesgw@gmail.com>

Acked-by: Peter Stuge <peter@stuge.se>

git-svn-id: svn://coreboot.org/repository/coreboot-v3@1048 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-11-24 14:06:10 +00:00
Carl-Daniel Hailfinger
e3abcbefc2 Replace magic numbers with existing symbolic constants. SB600 is heavily
affected. This mostly targets pci_*_config*() calls.

This is part of my quest to make existing code more readable without
looking up the meaning of magic numbers.

Ron pointed out that this enables better kscope usage.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@913 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-10-09 22:19:53 +00:00
Ronald G. Minnich
11c6d0d98d m57sli mostly builds again. The stage0 is too large at 24k.
We need to figure out if we should just grow stage0. My inclination is 
to say 'yes'.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@877 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-10-01 07:23:05 +00:00
Ronald G. Minnich
61e04287b8 Fix up references to pci functions now in stage 0.
Remove stage1.h -- not needed. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>

Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@763 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-14 16:16:07 +00:00
Carl-Daniel Hailfinger
17d2e172ca Use the correct MCP55 PCI subsystem ID setting function.
This fixes a genuine bug in the MCP55 code.

Moving this away from PCI ops is the next goal.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@762 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-14 09:37:46 +00:00
Ronald G. Minnich
0d9e8b717f compiles with no errors.
Add pci device. This compiles with no errors, no warnings.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>

With the comments addressed:
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

I left the #if 1 in. It was there for a reason, we just don't know what it was. 
I am reluctant to move such 'markers' at present. 


git-svn-id: svn://coreboot.org/repository/coreboot-v3@741 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-11 16:09:02 +00:00