arch_write_tables(), before a number of routines that write/reserve
stuff are executed (in my test this only affects the 0x0-0x500 region
but I notice there's other stuff too).
Attached patch moves it down, solving the problem. Because stage1 can no
longer assume the MBI is at 0xf0000, I had to add a return path for stage2
to give it a pointer, using its exit status value.
Signed-off-by: Robert Millan <rmh@aybabtu.com>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@936 f3766cd6-281f-0410-b1cd-43a5c92072e9
from v2 to install them. Linux boots fine and all interrupts
seem to work correctly -- the network comes up, USB hot plug works,
I can mount the USB disk, etc.
To enable pirq tables for a given mainboard, simply add the
select PIRQ_TABLE (see below) to the Kconfig for that board.
Again, this code builds and boots linux on the alix1c.
I think, with this change, we are very close to moving ALL LX boards to
v3 and deprecating v2. The major remaining fix is to add an empty LAR
entry to fill empty space in LAR and speed up the LAR file search
process.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Index: include/tables.h
Add prototype, conditioned on CONFIG_PIRQ_TABLE
Index: util/x86emu/vm86.c
Comment out 'debug trap' code that scribbles vectors at 0x4000.
I don't know why this is here, but I'd like to leave it #if'ed out --
somebody, at some point, thought we needed it. To reenable, we will need
to move stage2 code or these magic vectors.
Index: arch/x86/Makefile
Add support for conditional compilation of pirq support code.
Index: arch/x86/pirq_routing.c
Add this file from v2.
Index: arch/x86/archtables.c
Add call to write_pirq_routing_table (controlled by #ifdef
CONFIG_PIRQ_TABLE)
Index: arch/x86/Kconfig
Add new config variable: PIRQ_TABLE
Index: device/device.c
Fix some trivial bugs.
Index: mainboard/pcengines/alix1c/Makefile
Add pirq table code for stage2
Index: mainboard/pcengines/alix1c/dts
Modify dts to properly set southbridge variables
Index: mainboard/pcengines/alix1c/irq_tables.c
Add code from v2 for the alix1c.
Index: mainboard/pcengines/Kconfig
Add 'select PIRQ_TABLE'
Index: include/arch/x86/pirq_routing.h
Add include file from v2.
Remove all the SLOTCOUNT nonsense. This hack was only needed
for a very early version of gcc 3.x, where they screwed up the
creation of struct members that used the [] syntax for variable-length
array at the end of the struct.
Index: include/device/pci.h
Add prototype
git-svn-id: svn://coreboot.org/repository/coreboot-v3@582 f3766cd6-281f-0410-b1cd-43a5c92072e9
- I left LB_TAG_ intact because they are used by the payloads
- file renames are still missing. see next commit
- some lb_ renames might be missing. feel free to provide patches.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/coreboot-v3@564 f3766cd6-281f-0410-b1cd-43a5c92072e9
numeric constants and #defines for such constants. Since grepping the
tree shouldn't be necessary to find a POST code and we already have
too many duplicated POST codes, gather almost all of them in a common
header file.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@549 f3766cd6-281f-0410-b1cd-43a5c92072e9
- Everything in include/cpu/generic/x86/arch/* goes into
include/arch/x86 now.
- include/cpu/generic/x86/div64.h moves into include/arch/x86, too.
- The former include/cpu/generic/x86/arch/elf.h moved to
include/arch/x86/archelf.h, as elf.h already exists in include/
and we must prevent a name clash.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@314 f3766cd6-281f-0410-b1cd-43a5c92072e9
get rid of a directory which only contains a single file, and
at the same time simplify the #includes and their hierarchies.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@313 f3766cd6-281f-0410-b1cd-43a5c92072e9
* add mc146818rtc runtime option code
* drop linuxbios_tables.h - its redundant (tables.h)
* add subsystem id support
* add option_table as a lar file
* fix a typo in xconfig
* clean up x86emu makefile
* add initial support for normal/fallback (incomplete)
* add back LBCHKSUM support in linuxbios table
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@287 f3766cd6-281f-0410-b1cd-43a5c92072e9
Add "(LB) " to all log messages to differentiate them visually
from the rest of the boot messages. This is similar to what
Xen does when booting (it prefixes all log messages with "(XEN) ").
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@209 f3766cd6-281f-0410-b1cd-43a5c92072e9
Remaining to be done:
PIRQ table
MP table
ACPI table
relocate the GDT reload to a sensible place -- or figure out if we even
need to bother; we're back to execute in place and the GDT is in flash
rom ==> we can leave it until we boot the payload I think.
At this point, however, we've got the basic bits to sensibly create
tables.
This has been tested and works on bochs.
It is working to a point, but still failing on qemu for reasons we don't
quite understand.
Elfboot
Found ELF candidate at offset 0
New segment addr 0x100000 size 0x21310 offset 0xc0 filesize 0x7348
(cleaned up) New segment addr 0x100000 size 0x7348 offset 0xc0
set 00100000 to 0 for 0 bytes
Copy to 00100000 from fffc3f24 for 29512 bytes
New segment addr 0x121320 size 0x48 offset 0x7420 filesize 0x48
(cleaned up) New segment addr 0x121320 size 0x48 offset 0x7420
set 00121320 to 0 for 0 bytes
Copy to 00121320 from fffcb284 for 72 bytes
Dropping non PT_LOAD segment
Dropping non PT_LOAD segment
Jumping to boot code at 0x1047c0
FILO version 0.5 (rminnich@q.ccstar.lanl.gov) Sun Feb 25 10:19:16 MST
2007
collect_sys_info: boot eax = 0xfe
collect_sys_info: boot ebx = 0xffffd4ca
collect_sys_info: boot arg = 0x1047c0
collect_linuxbios_info: NOT Searching for LinuxBIOS tables...
Can't get memory map from firmware. Using hardcoded default.
collect_sys_info: 0000000000000000-00000000000a0000
collect_sys_info: 0000000000100000-0000000002000000
collect_sys_info: RAM 32 MB
relocate: Current location: 0x1000c7-0x12142e
relocate: Relocating to 0x1fdec90-0x1fffff7... ok
Press <Enter> for default boot, or <Esc> for boot prompt...
boot: hdc1:/phase1 root=/dev/hdc1 console=ttyS0,115200
malloc_check: invalid head->prev_size: 0x0
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@133 f3766cd6-281f-0410-b1cd-43a5c92072e9
resource .c functions -- sigh -- this will be next.
fix types, fix some usage, but we do not yet generate pirqi, mptables,
or acpi. This will be next.
This code will be called from phase6 in stage 2, and probably
attached to a cpu. Or, it will be inline in the stage2.c code, since
the need for tables is generic.
I'm also going to move the cryptic usage of lgdt from here to stage 2,
phase 2, of the cpu code. The device model improvements are making it
easier to think about when things happen, we are finding.
I'm going to get lunch and go see some of brussels. It's a miserable day
but ...
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@130 f3766cd6-281f-0410-b1cd-43a5c92072e9
We have merged the plethora of include files into one. A given linuxbios
target architecture must support all the functions described therein.
All the structs etc. in include/tables.h are known to be
architecture-independent.
We hope this new layout is easier to folow than the old one.
Todo: Remove the LGDT code from tables writing (how did THAT get in
there ;-) and put it somewhere sane; add OFW table support. We are going
to need some nice OFW table code.
Also, the license headers should be correct in this commit.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@128 f3766cd6-281f-0410-b1cd-43a5c92072e9
