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CONFIG_NORTHBRIDGE_INTEL_I440BXEMULATION_RAMSIZE was never used. Kill

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it. Since it was the only content of the i440bxemulation northbridge
Kconfig, kill that file as well.
The i440BX RAM size is determined from the dts and the chipset specified
size is ignored. Print a warning for that, especially because v2 uses
the chipset specified RAM size.

Build and boot tested on qemu.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@766 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Carl-Daniel Hailfinger 2008-08-15 16:41:37 +00:00
parent 8f3ad70a03
commit fe0147c155
6 changed files with 3 additions and 31 deletions
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1
Kconfig
View file

@ -94,7 +94,6 @@ config SUPERIO_ITE_IT8716F
boolean
# Source all northbridge/southbridge/superio Kconfig files:
source northbridge/intel/i440bxemulation/Kconfig
menu "Payload"

1
mainboard/emulation/qemu-x86/defconfig
View file

@ -83,7 +83,6 @@ CONFIG_PCI_OPTION_ROM_RUN_VM86=y
CONFIG_NORTHBRIDGE_INTEL_I440BXEMULATION=y
CONFIG_SOUTHBRIDGE_INTEL_I82371EB=y
CONFIG_SUPERIO_WINBOND_W83627HF=y
CONFIG_NORTHBRIDGE_INTEL_I440BXEMULATION_RAMSIZE=32
#
# Payload

1
mainboard/pcengines/alix1c/defconfig
View file

@ -91,7 +91,6 @@ CONFIG_PCI_OPTION_ROM_RUN_VM86=y
CONFIG_NORTHBRIDGE_AMD_GEODELX=y
CONFIG_SOUTHBRIDGE_AMD_CS5536=y
CONFIG_SUPERIO_WINBOND_W83627HF=y
CONFIG_NORTHBRIDGE_INTEL_I440BXEMULATION_RAMSIZE=32
#
# Payload

1
mainboard/pcengines/alix2c3/defconfig
View file

@ -84,7 +84,6 @@ CONFIG_PCI_OPTION_ROM_RUN_VM86=y
#
CONFIG_NORTHBRIDGE_AMD_GEODELX=y
CONFIG_SOUTHBRIDGE_AMD_CS5536=y
CONFIG_NORTHBRIDGE_INTEL_I440BXEMULATION_RAMSIZE=32
#
# Payload

27
northbridge/intel/i440bxemulation/Kconfig
View file

@ -1,27 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2007 Ronald G. Minnich <rminnich@gmail.com>
## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config NORTHBRIDGE_INTEL_I440BXEMULATION_RAMSIZE
int
default 32 # Mbytes
help
This is the default RAM size of emulation.

3
northbridge/intel/i440bxemulation/i440bx.c
View file

@ -56,9 +56,12 @@ static void pci_domain_set_resources(struct device *dev)
struct northbridge_intel_i440bxemulation_domain_config *device_configuration =
dev->device_configuration;
tolmk = device_configuration->ramsize * 1024;
printk(BIOS_WARNING, "Ignoring chipset specified RAM size. Using dts "
"settings of %d kB instead.\n", tolmk);
mc_dev = dev->link[0].children;
if (mc_dev) {
idx = 10;
#warning FIXME: We have no memory hole between 640 and 768 kB
ram_resource(dev, idx++, 0, tolmk);
}
phase4_assign_resources(&dev->link[0]);