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southbridge/intel/i82801dx: transition away from device_t
Replace the use of the old device_t definition inside southbridge/intel/i82801dx. Change-Id: Ic08a23f672f8b5e40b837d49a9475d52c728a306 Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/16485 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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3 changed files with 3 additions and 3 deletions
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@ -22,7 +22,7 @@
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void enable_smbus(void)
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void enable_smbus(void)
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{
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{
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device_t dev = PCI_DEV(0x0, 0x1f, 0x3);
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pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3);
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printk(BIOS_DEBUG, "SMBus controller enabled\n");
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printk(BIOS_DEBUG, "SMBus controller enabled\n");
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/* set smbus iobase */
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/* set smbus iobase */
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@ -30,7 +30,7 @@
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#include <arch/acpi.h>
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#include <arch/acpi.h>
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#if !defined(__ASSEMBLER__)
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#if !defined(__ASSEMBLER__)
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#if !defined(__PRE_RAM__)
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#if !defined(__SIMPLE_DEVICE__)
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#include "chip.h"
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#include "chip.h"
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extern void i82801dx_enable(device_t dev);
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extern void i82801dx_enable(device_t dev);
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#else
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#else
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@ -240,7 +240,7 @@ static void busmaster_disable_on_bus(int bus)
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for (slot = 0; slot < 0x20; slot++) {
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for (slot = 0; slot < 0x20; slot++) {
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for (func = 0; func < 8; func++) {
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for (func = 0; func < 8; func++) {
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u32 reg32;
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u32 reg32;
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device_t dev = PCI_DEV(bus, slot, func);
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pci_devfn_t dev = PCI_DEV(bus, slot, func);
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val = pci_read_config32(dev, PCI_VENDOR_ID);
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val = pci_read_config32(dev, PCI_VENDOR_ID);
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