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k7sem support
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70305464cb
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4 changed files with 40 additions and 25 deletions
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@ -15,7 +15,10 @@ mainboardinit cpu/p6/earlymtrr.inc
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option ENABLE_FIXED_AND_VARIABLE_MTRRS=1
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option FINAL_MAINBOARD_FIXUP=1
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option HAVE_PIRQ_TABLE=1
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option CONFIG_SIS_DISABLE_ETHERNET
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option DISABLE_INTERNAL_DEVICES
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# this makes ipl.S too big
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#option CONFIG_SIS_DISABLE_ETHERNET
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object mainboard.o
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object irq_tables.o
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keyboard pc80
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@ -1,27 +1,30 @@
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/* This file was generated by getpir.c, do not modify!
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(but if you do, please run checkpir on it to verify)
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Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
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Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
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*/
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#include <arch/pirq_routing.h>
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#define CHECKSUM 0x14
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const struct irq_routing_table intel_irq_routing_table = {
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PIRQ_SIGNATURE, /* u32 signature */
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PIRQ_VERSION, /* u16 version */
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32+16*4, /* there can be total 5 devices on the bus */
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0x00, /* Bus 0 */
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0x08, /* Device 1, Function 0 */
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0x0000, /* reserve IRQ 11, 9, 5, for PCI */
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0x1039, /* Silicon Integrated System */
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0x0008, /* SiS 85C503/5513 ISA Bridge */
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0x00, /* u8 miniport_data - "crap" */
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PIRQ_SIGNATURE, /* u32 signature */
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PIRQ_VERSION, /* u16 version */
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32+16*6, /* there can be total 6 devices on the bus */
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0, /* Where the interrupt router lies (bus) */
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0x8, /* Where the interrupt router lies (dev) */
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0x828, /* IRQs devoted exclusively to PCI usage */
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0x1039, /* Vendor */
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0x8, /* Device */
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0, /* Crap (miniport) */
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{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
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CHECKSUM, /* u8 checksum - mod 256 checksum must give zero */
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0x1b, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
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{
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/* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
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{0x00, 0x08, {{0x41, 0xdcb8}, {0x42, 0xdcb8}, {0x43, 0xdcb8}, {0x44, 0xdcb8}},
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0x00, 0x00},
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{0x00, 0x10, {{0x41, 0xdcb8}, {0x42, 0xdcb8}, {0x43, 0xdcb8}, {0x44, 0xdcb8}},
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0x00, 0x00},
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{0x00, 0x48, {{0x41, 0xdcb8}, {0x42, 0xdcb8}, {0x43, 0xdcb8}, {0x44, 0xdcb8}},
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0x01, 0x00},
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{0x00, 0x58, {{0x43, 0xdcb8}, {0x44, 0xdcb8}, {0x41, 0xdcb8}, {0x42, 0xdcb8}},
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0x02, 0x00},
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{0,0x48, {{0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}, {0x41, 0xdef8}}, 0x1, 0},
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{0,0x58, {{0x43, 0xdef8}, {0x44, 0xdef8}, {0x41, 0xdef8}, {0x42, 0xdef8}}, 0x2, 0},
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{0,0x68, {{0x44, 0xdef8}, {0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}}, 0x3, 0},
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{0,0x1, {{0x61, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
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{0,0x10, {{0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}}, 0, 0},
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{0,0xa, {{0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}}, 0, 0},
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}
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};
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@ -13,8 +13,21 @@ final_mainboard_fixup(void)
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void final_southbridge_fixup(void);
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void final_superio_fixup(void);
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extern unsigned long slotsizeM[];
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printk_info("elitegroup k7sem (and similar)...");
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#if 0
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// THIS WORKS in the sense of turning it off.
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// but it happens too late in the game.
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printk_info("disabling sis 900 ethernet, old val 0x%x\n",
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pcibios_read_config_byte(0, 0x8, 0x7c));
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pcibios_write_config_byte(0, 0x8, 0x7c, 0x0f);
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printk_info("disabling sis 900 ethernet, new val 0x%x\n",
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pcibios_read_config_byte(0, 0x8, 0x7c));
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#endif
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// we need to fix up the K7 MSRs.
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// to do this, we get the DIMM sizes in slot1 and 2, and
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// call fixk7msr_2dimms
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@ -55,10 +55,6 @@ sis730spd_start:
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movw $0x5501, %ax # Mode# enable, this bit
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CALL_SP(write_pci_register) # should be set before sizing.
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#ifdef CONFIG_SIS_DISABLE_ETHERNET
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mowv $0x7c0f, %ax
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CALL_SP(write_lpc_register)
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#endif
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#ifdef SIZE_ALL
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xorw %bx, %bx # clear %fs, %fs is used as "bitmap" of
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