mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
src/device: Add required space before opening parenthesis '('
Change-Id: I48477c2917ab1be14d3cedf25e8b97dae1c1d309 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16289 Tested-by: build bot (Jenkins) Reviewed-by: Omar Pakker
This commit is contained in:
parent
11fc8015bd
commit
f772f9c6d2
4 changed files with 14 additions and 14 deletions
|
@ -1138,9 +1138,9 @@ Return the offset given by "mod" addressing.
|
||||||
|
|
||||||
unsigned decode_rmXX_address(int mod, int rm)
|
unsigned decode_rmXX_address(int mod, int rm)
|
||||||
{
|
{
|
||||||
if(mod == 0)
|
if (mod == 0)
|
||||||
return decode_rm00_address(rm);
|
return decode_rm00_address(rm);
|
||||||
if(mod == 1)
|
if (mod == 1)
|
||||||
return decode_rm01_address(rm);
|
return decode_rm01_address(rm);
|
||||||
return decode_rm10_address(rm);
|
return decode_rm10_address(rm);
|
||||||
}
|
}
|
||||||
|
|
|
@ -211,7 +211,7 @@ static void x86emuOp_genop_byte_RM_R(u8 op1)
|
||||||
DECODE_PRINTF(x86emu_GenOpName[op1]);
|
DECODE_PRINTF(x86emu_GenOpName[op1]);
|
||||||
DECODE_PRINTF("\t");
|
DECODE_PRINTF("\t");
|
||||||
FETCH_DECODE_MODRM(mod, rh, rl);
|
FETCH_DECODE_MODRM(mod, rh, rl);
|
||||||
if(mod<3)
|
if (mod<3)
|
||||||
{ destoffset = decode_rmXX_address(mod,rl);
|
{ destoffset = decode_rmXX_address(mod,rl);
|
||||||
DECODE_PRINTF(",");
|
DECODE_PRINTF(",");
|
||||||
destval = fetch_data_byte(destoffset);
|
destval = fetch_data_byte(destoffset);
|
||||||
|
@ -251,7 +251,7 @@ static void x86emuOp_genop_word_RM_R(u8 op1)
|
||||||
DECODE_PRINTF("\t");
|
DECODE_PRINTF("\t");
|
||||||
FETCH_DECODE_MODRM(mod, rh, rl);
|
FETCH_DECODE_MODRM(mod, rh, rl);
|
||||||
|
|
||||||
if(mod<3) {
|
if (mod<3) {
|
||||||
destoffset = decode_rmXX_address(mod,rl);
|
destoffset = decode_rmXX_address(mod,rl);
|
||||||
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
|
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
|
||||||
u32 destval;
|
u32 destval;
|
||||||
|
|
|
@ -1507,7 +1507,7 @@ static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
|
||||||
TRACE_AND_STEP();
|
TRACE_AND_STEP();
|
||||||
srcval = fetch_data_long(srcoffset);
|
srcval = fetch_data_long(srcoffset);
|
||||||
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
|
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
|
||||||
for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
|
for (*dstreg = 0; *dstreg < 32; (*dstreg)++)
|
||||||
if ((srcval >> *dstreg) & 1) break;
|
if ((srcval >> *dstreg) & 1) break;
|
||||||
} else {
|
} else {
|
||||||
u16 srcval, *dstreg;
|
u16 srcval, *dstreg;
|
||||||
|
@ -1516,7 +1516,7 @@ static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
|
||||||
TRACE_AND_STEP();
|
TRACE_AND_STEP();
|
||||||
srcval = fetch_data_word(srcoffset);
|
srcval = fetch_data_word(srcoffset);
|
||||||
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
|
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
|
||||||
for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
|
for (*dstreg = 0; *dstreg < 16; (*dstreg)++)
|
||||||
if ((srcval >> *dstreg) & 1) break;
|
if ((srcval >> *dstreg) & 1) break;
|
||||||
}
|
}
|
||||||
} else { /* register to register */
|
} else { /* register to register */
|
||||||
|
@ -1528,7 +1528,7 @@ static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
|
||||||
dstreg = DECODE_RM_LONG_REGISTER(rh);
|
dstreg = DECODE_RM_LONG_REGISTER(rh);
|
||||||
TRACE_AND_STEP();
|
TRACE_AND_STEP();
|
||||||
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
|
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
|
||||||
for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
|
for (*dstreg = 0; *dstreg < 32; (*dstreg)++)
|
||||||
if ((srcval >> *dstreg) & 1) break;
|
if ((srcval >> *dstreg) & 1) break;
|
||||||
} else {
|
} else {
|
||||||
u16 srcval, *dstreg;
|
u16 srcval, *dstreg;
|
||||||
|
@ -1538,7 +1538,7 @@ static void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
|
||||||
dstreg = DECODE_RM_WORD_REGISTER(rh);
|
dstreg = DECODE_RM_WORD_REGISTER(rh);
|
||||||
TRACE_AND_STEP();
|
TRACE_AND_STEP();
|
||||||
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
|
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
|
||||||
for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
|
for (*dstreg = 0; *dstreg < 16; (*dstreg)++)
|
||||||
if ((srcval >> *dstreg) & 1) break;
|
if ((srcval >> *dstreg) & 1) break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -1568,7 +1568,7 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
|
||||||
TRACE_AND_STEP();
|
TRACE_AND_STEP();
|
||||||
srcval = fetch_data_long(srcoffset);
|
srcval = fetch_data_long(srcoffset);
|
||||||
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
|
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
|
||||||
for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
|
for (*dstreg = 31; *dstreg > 0; (*dstreg)--)
|
||||||
if ((srcval >> *dstreg) & 1) break;
|
if ((srcval >> *dstreg) & 1) break;
|
||||||
} else {
|
} else {
|
||||||
u16 srcval, *dstreg;
|
u16 srcval, *dstreg;
|
||||||
|
@ -1577,7 +1577,7 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
|
||||||
TRACE_AND_STEP();
|
TRACE_AND_STEP();
|
||||||
srcval = fetch_data_word(srcoffset);
|
srcval = fetch_data_word(srcoffset);
|
||||||
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
|
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
|
||||||
for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
|
for (*dstreg = 15; *dstreg > 0; (*dstreg)--)
|
||||||
if ((srcval >> *dstreg) & 1) break;
|
if ((srcval >> *dstreg) & 1) break;
|
||||||
}
|
}
|
||||||
} else { /* register to register */
|
} else { /* register to register */
|
||||||
|
@ -1589,7 +1589,7 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
|
||||||
dstreg = DECODE_RM_LONG_REGISTER(rh);
|
dstreg = DECODE_RM_LONG_REGISTER(rh);
|
||||||
TRACE_AND_STEP();
|
TRACE_AND_STEP();
|
||||||
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
|
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
|
||||||
for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
|
for (*dstreg = 31; *dstreg > 0; (*dstreg)--)
|
||||||
if ((srcval >> *dstreg) & 1) break;
|
if ((srcval >> *dstreg) & 1) break;
|
||||||
} else {
|
} else {
|
||||||
u16 srcval, *dstreg;
|
u16 srcval, *dstreg;
|
||||||
|
@ -1599,7 +1599,7 @@ static void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
|
||||||
dstreg = DECODE_RM_WORD_REGISTER(rh);
|
dstreg = DECODE_RM_WORD_REGISTER(rh);
|
||||||
TRACE_AND_STEP();
|
TRACE_AND_STEP();
|
||||||
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
|
CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
|
||||||
for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
|
for (*dstreg = 15; *dstreg > 0; (*dstreg)--)
|
||||||
if ((srcval >> *dstreg) & 1) break;
|
if ((srcval >> *dstreg) & 1) break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -2295,7 +2295,7 @@ Implements the IN string instruction and side effects.
|
||||||
|
|
||||||
static void single_in(int size)
|
static void single_in(int size)
|
||||||
{
|
{
|
||||||
if(size == 1)
|
if (size == 1)
|
||||||
store_data_byte_abs(M.x86.R_ES, M.x86.R_DI,(*sys_inb)(M.x86.R_DX));
|
store_data_byte_abs(M.x86.R_ES, M.x86.R_DI,(*sys_inb)(M.x86.R_DX));
|
||||||
else if (size == 2)
|
else if (size == 2)
|
||||||
store_data_word_abs(M.x86.R_ES, M.x86.R_DI,(*sys_inw)(M.x86.R_DX));
|
store_data_word_abs(M.x86.R_ES, M.x86.R_DI,(*sys_inw)(M.x86.R_DX));
|
||||||
|
@ -2337,7 +2337,7 @@ Implements the OUT string instruction and side effects.
|
||||||
|
|
||||||
static void single_out(int size)
|
static void single_out(int size)
|
||||||
{
|
{
|
||||||
if(size == 1)
|
if (size == 1)
|
||||||
(*sys_outb)(M.x86.R_DX,fetch_data_byte_abs(M.x86.R_ES, M.x86.R_SI));
|
(*sys_outb)(M.x86.R_DX,fetch_data_byte_abs(M.x86.R_ES, M.x86.R_SI));
|
||||||
else if (size == 2)
|
else if (size == 2)
|
||||||
(*sys_outw)(M.x86.R_DX,fetch_data_word_abs(M.x86.R_ES, M.x86.R_SI));
|
(*sys_outw)(M.x86.R_DX,fetch_data_word_abs(M.x86.R_ES, M.x86.R_SI));
|
||||||
|
|
Loading…
Add table
Reference in a new issue