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UPSTREAM: mainboard/google/reef: Set edge triggered interrupt for GPIO_22
EC sets the logic level based on outstanding wake events. When GPIO_22
is configured as a level triggered interrupt, the events are not
cleared from the interrupt handler. Hence, we'd just be re-signalling
over and over causing an interrupt storm upon lid open. So, GPIO_22
needs to be configured as EDGE_SINGLE instead of LEVEL.
BUG=chrome-os-partner:62458
TEST=Lid close/open. check CPU usage using top. It should
not show 70% CPU usage.
Signed-off-by: Vaibhav Shankar <vaibhav.shankar@intel.com>
Change-Id: I5c6a65c35d217d4c62dcde004f78f024332cb3b8
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 6e5609124e
Original-Change-Id: I710a690578c6e5b63be34b7fbcb21c703ef56e3a
Original-Reviewed-on: https://review.coreboot.org/18267
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Venkateswarlu V Vinjamuri <venkateswarlu.v.vinjamuri@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://chromium-review.googlesource.com/435398
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@ -299,7 +299,7 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPI(GPIO_19, UP_20K, DEEP), /* unused */
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PAD_CFG_GPI_APIC_LOW(GPIO_20, UP_20K, DEEP), /* NFC IRQ */
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PAD_CFG_GPI_APIC_LOW(GPIO_21, NONE, DEEP), /* Touch IRQ */
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PAD_CFG_GPI_SCI_LOW(GPIO_22, NONE, DEEP, LEVEL), /* EC wake */
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PAD_CFG_GPI_SCI_LOW(GPIO_22, NONE, DEEP, EDGE_SINGLE), /* EC wake */
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PAD_CFG_GPI(GPIO_23, UP_20K, DEEP), /* unused */
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PAD_CFG_GPI(GPIO_24, NONE, DEEP), /* PEN_PDCT_ODL */
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PAD_CFG_GPI(GPIO_25, UP_20K, DEEP), /* unused */
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