UPSTREAM: pcengines/apu2: Remove DDI configuration

Assembled SoC part does not have integrated graphics.

BUG=none
BRANCH=none
TEST=none

Change-Id: Ie3ca1ab1421f57e4a91fee1a2fc8824c44ab0a69
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7747757772
Original-Change-Id: I5d157063cd850d343df73d448e6904c188a09730
Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/18150
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/430620
Commit-Ready: Aaron Durbin <adurbin@chromium.org>
Tested-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki 2017-01-14 13:01:16 +02:00 committed by chrome-bot
parent 5700b39b70
commit f349e894e7

View file

@ -69,32 +69,11 @@ static const PCIe_PORT_DESCRIPTOR PortList [] = {
} }
}; };
static const PCIe_DDI_DESCRIPTOR DdiList [] = {
/* DP0 to HDMI0/DP */
{
0,
PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 8, 11),
PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1)
},
/* DP1 to FCH */
{
0,
PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 12, 15),
PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux2, Hdp2)
},
/* DP2 to HDMI1/DP */
{
DESCRIPTOR_TERMINATE_LIST,
PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 16, 19),
PCIE_DDI_DATA_INITIALIZER (ConnectorTypeCrt, Aux3, Hdp3)
},
};
static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = { static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = {
.Flags = DESCRIPTOR_TERMINATE_LIST, .Flags = DESCRIPTOR_TERMINATE_LIST,
.SocketId = 0, .SocketId = 0,
.PciePortList = PortList, .PciePortList = PortList,
.DdiLinkList = DdiList .DdiLinkList = NULL,
}; };
/*---------------------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------------------*/