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UPSTREAM: pcengines/apu2: Remove DDI configuration
Assembled SoC part does not have integrated graphics.
BUG=none
BRANCH=none
TEST=none
Change-Id: Ie3ca1ab1421f57e4a91fee1a2fc8824c44ab0a69
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7747757772
Original-Change-Id: I5d157063cd850d343df73d448e6904c188a09730
Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/18150
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/430620
Commit-Ready: Aaron Durbin <adurbin@chromium.org>
Tested-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
parent
5700b39b70
commit
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1 changed files with 1 additions and 22 deletions
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@ -69,32 +69,11 @@ static const PCIe_PORT_DESCRIPTOR PortList [] = {
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}
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}
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};
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};
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static const PCIe_DDI_DESCRIPTOR DdiList [] = {
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/* DP0 to HDMI0/DP */
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{
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0,
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PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 8, 11),
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PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux1, Hdp1)
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},
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/* DP1 to FCH */
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{
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0,
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PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 12, 15),
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PCIE_DDI_DATA_INITIALIZER (ConnectorTypeDP, Aux2, Hdp2)
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},
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/* DP2 to HDMI1/DP */
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{
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DESCRIPTOR_TERMINATE_LIST,
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PCIE_ENGINE_DATA_INITIALIZER (PcieDdiEngine, 16, 19),
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PCIE_DDI_DATA_INITIALIZER (ConnectorTypeCrt, Aux3, Hdp3)
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},
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};
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static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = {
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static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = {
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.Flags = DESCRIPTOR_TERMINATE_LIST,
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.Flags = DESCRIPTOR_TERMINATE_LIST,
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.SocketId = 0,
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.SocketId = 0,
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.PciePortList = PortList,
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.PciePortList = PortList,
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.DdiLinkList = DdiList
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.DdiLinkList = NULL,
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};
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};
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/*---------------------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------------------*/
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