UPSTREAM: northbridge/intel/e7505/debug.c: Improve code formatting

BUG=None
BRANCH=None
TEST=None

Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16588
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

Change-Id: I63f58d95fa01b1f73f3620a5d13f21ef62e2404c
Reviewed-on: https://chromium-review.googlesource.com/388292
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Elyes HAOUAS 2016-09-20 19:16:55 +02:00 committed by chrome-bot
parent 5e0c6c8a05
commit f078c7901a

View file

@ -78,8 +78,8 @@ void dump_pci_devices_on_bus(unsigned busn)
uint32_t id;
id = pci_read_config32(dev, PCI_VENDOR_ID);
if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
(((id >> 16) & 0xffff) == 0xffff) ||
(((id >> 16) & 0xffff) == 0x0000)) {
(((id >> 16) & 0xffff) == 0xffff) ||
(((id >> 16) & 0xffff) == 0x0000)) {
continue;
}
dump_pci_device(dev);
@ -156,7 +156,6 @@ void dump_smbus_registers(void)
void dump_io_resources(unsigned port)
{
int i;
printk(BIOS_DEBUG, "%04x:\n", port);
for (i = 0; i < 256; i++) {