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https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
reorg, and recovery from my mistake.
This commit is contained in:
parent
47717b57f3
commit
ef20fb22dc
5 changed files with 34 additions and 41 deletions
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@ -15,8 +15,9 @@ CPUFLAGS += -DRAMTEST
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CPUFLAGS += -DCMD_LINE='"ro root=/dev/hda1 console=ttyS0,115200 single "'
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TOP=../..
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INCLUDES=-I $(TOP)/src/include
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CFLAGS=$(INCLUDES) -O2 $(CPUFLAGS) -Ilinux/include -Wall
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INCLUDES=-nostdinc -I $(TOP)/src/include
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NOOPT_CFLAGS=$(INCLUDES) $(CPUFLAGS) -Wall
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CFLAGS=$(NOOPT_CFLAGS) -O2
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OBJECTS=crt0.o hardwaremain.o linuxbiosmain.o
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OBJECTS += mainboard.o mtrr.o subr.o fill_inbuf.o params.o
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@ -123,16 +124,16 @@ microcode.o: $(TOP)/src/cpu/p6/microcode.c
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serial_subr.o: $(TOP)/chip/intel/serial_subr.c
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cc $(CFLAGS) -c $<
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printk.o: $(TOP)/lib/printk.c
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printk.o: $(TOP)/src/lib/printk.c
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cc $(CFLAGS) -c $<
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vsprintf.o: $(TOP)/lib/vsprintf.c
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vsprintf.o: $(TOP)/src/lib/vsprintf.c
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cc $(CFLAGS) -c $<
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newpci.o: $(TOP)/lib/newpci.c
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newpci.o: $(TOP)/src/lib/newpci.c
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cc $(CFLAGS) -c $<
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linuxpci.o: $(TOP)/lib/linuxpci.c
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linuxpci.o: $(TOP)/src/lib/linuxpci.c
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cc $(CFLAGS) -c $<
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vmlinux.bin.gz.block: vmlinux.bin.gz
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@ -35,7 +35,7 @@ void intel_set_mtrr(unsigned long rambase, unsigned long ramsizeK);
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#ifdef NEWPCI /* IRQ routing stuff */
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#include <pci.h>
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#include <lbpci.h>
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#include <pci-i386.h>
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#define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
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@ -14,7 +14,8 @@
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* RGM
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*/
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#include <lbpci.h>
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#include <asm/io.h>
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#include <pci_ids.h>
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#include <cpu/p5/io.h>
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extern void intel_post(unsigned char value);
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#define DEBUG
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@ -208,11 +209,19 @@ unsigned int pci_scan_bus(struct pci_bus *bus)
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u32 id, class, addr;
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u8 cmd, tmp, hdr_type;
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if (pcibios_read_config_dword(bus->number, devfn, PCI_VENDOR_ID, &id))
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// gcc just went to hell. Don't test -- this always
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// returns 0 anyway.
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#if GCC_WORKS_ON_O2
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if (pcibios_read_config_dword(bus->number, devfn, PCI_VENDOR_ID, &id)) {
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DBG("PCI: devfn 0x%x, read_config_dword fails\n", devfn);
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continue;
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}
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#endif
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pcibios_read_config_dword(bus->number, devfn, PCI_VENDOR_ID, &id);
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/* some broken boards return 0 if a slot is empty: */
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if (id == 0xffffffff || id == 0x00000000 || id == 0x0000ffff || id == 0xffff0000) {
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DBG("PCI: devfn 0x%x, bad id 0x%x\n", devfn, id);
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if (PCI_FUNC(devfn) == 0x00) {
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/* if this is a function 0 device and it is not present,
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skip to next device */
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@ -222,11 +231,15 @@ unsigned int pci_scan_bus(struct pci_bus *bus)
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continue;
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}
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if (pcibios_read_config_byte(bus->number, devfn, PCI_HEADER_TYPE, &hdr_type))
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if (pcibios_read_config_byte(bus->number, devfn, PCI_HEADER_TYPE, &hdr_type)){
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DBG("PCI: devfn 0x%x, header type read fails\n", devfn);
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continue;
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}
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if (pcibios_read_config_dword(bus->number, devfn, PCI_CLASS_REVISION, &class))
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if (pcibios_read_config_dword(bus->number, devfn, PCI_CLASS_REVISION, &class)) {
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DBG("PCI: devfn 0x%x, class read fails\n", devfn);
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continue;
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}
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if ((dev = kmalloc(sizeof(*dev), GFP_ATOMIC)) == NULL) {
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printk("PCI: out of memory.\n");
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@ -332,9 +345,9 @@ unsigned int pci_scan_bus(struct pci_bus *bus)
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* this bus number as a peer bus, don't also scan it
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* as a child bus
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*/
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if (((dev->vendor == PCI_VENDOR_ID_RCC) &&
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((dev->device == PCI_DEVICE_ID_RCC_HE) ||
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(dev->device == PCI_DEVICE_ID_RCC_LE))) ||
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if (((dev->vendor == PCI_VENDOR_ID_SERVERWORKS) &&
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((dev->device == PCI_DEVICE_ID_SERVERWORKS_HE) ||
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(dev->device == PCI_DEVICE_ID_SERVERWORKS_LE))) ||
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((dev->vendor == PCI_VENDOR_ID_COMPAQ) &&
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(dev->device == PCI_DEVICE_ID_COMPAQ_6010)) ||
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((dev->vendor == PCI_VENDOR_ID_INTEL) &&
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@ -449,6 +462,7 @@ unsigned int pci_scan_bus(struct pci_bus *bus)
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* scan it.
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* @param bus The bus number supported by the peer bridge
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* @return Pointer to the bus struct for this bus number.
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*/
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struct pci_bus *pci_scan_peer_bridge(int bus)
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{
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struct pci_bus *b;
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@ -12,7 +12,7 @@ static char rcsid[] = "$Id$";
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#include <cpu/p5/macros.h>
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#include <printk.h>
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#include <pci.h>
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#include <lbpci.h>
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#include <subr.h>
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#ifdef SERIAL_CONSOLE
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@ -119,28 +119,6 @@ void intel_post(char value)
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outb(value, 0x80);
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}
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/*
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* Write the special configuration registers on the INTEL
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*/
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void intel_conf_writeb(unsigned long port, unsigned char value)
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{
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unsigned char whichbyte = port & 3;
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port &= (~3);
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outl(port, PCI_CONF_REG_INDEX);
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outb(value, PCI_CONF_REG_DATA + whichbyte);
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}
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/*
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* Read the special configuration registers on the INTEL
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*/
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unsigned char intel_conf_readb(unsigned long port)
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{
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unsigned char whichbyte = port & 3;
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port &= (~3);
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outl(port, PCI_CONF_REG_INDEX);
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return inb(PCI_CONF_REG_DATA + whichbyte);
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}
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void intel_cache_on(unsigned long base, unsigned long totalram)
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{
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intel_post(0x60);
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@ -1,4 +1,4 @@
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#include <pci.h>
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#include <lbpci.h>
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#include <pc80/keyboard.h>
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#include <printk.h>
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