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UPSTREAM: SPD: fix DDR3 SDRAM memory module types

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Correct the definitions for 16b and 32b SO-DIMM modules.
Regarding JEDEC Standard No. 21-C
Annex K: Serial Presence Detect for DDR3 SDRAM Modules (2014),
the hex values used for 16b-SO-DIMM is 0x0c
and for 32b-SO-DIMM module type is 0x0d

Change-Id: I9210ac3409a4aaf55a0f6411d5960cfdca05068d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/15262
Tested-by: build bot (Jenkins)
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://chromium-review.googlesource.com/356442
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Elyes HAOUAS 2016-06-19 12:38:47 +02:00 • committed by chrome-bot
parent e9ca920ca9
commit edb5e3ec1d
1 changed files with 8 additions and 2 deletions
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10
src/include/device/dram/ddr3.h
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@ -14,6 +14,12 @@
* GNU General Public License for more details.
*/
/*
* JEDEC Standard No. 21-C
* Annex K: Serial Presence Detect (SPD) for DDR3 SDRAM Modules 2014
* http://www.jedec.org/sites/default/files/docs/4_01_02_11R24.pdf
*/
#ifndef DEVICE_DRAM_DDR3L_H
#define DEVICE_DRAM_DDR3L_H
@ -82,8 +88,8 @@ enum spd_dimm_type {
SPD_DIMM_TYPE_72B_SO_RDIMM = 0x09,
SPD_DIMM_TYPE_72B_SO_CDIMM = 0x0a,
SPD_DIMM_TYPE_LRDIMM = 0x0b,
SPD_DIMM_TYPE_16B_SO_DIMM = 0x0d,
SPD_DIMM_TYPE_32B_SO_DIMM = 0x0e,
SPD_DIMM_TYPE_16B_SO_DIMM = 0x0c,
SPD_DIMM_TYPE_32B_SO_DIMM = 0x0d,
/* Masks to bits 3:0 to give the dimm type */
SPD_DIMM_TYPE_MASK = 0x0f,
};