From ed9cd01e22abae677226253c3760ae20d422c62b Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Thu, 8 May 2008 14:51:40 +0000 Subject: [PATCH] Changed erroneous write config 8 to write config 32 Signed-off-by: Ronald G. Minnich Acked-by: Carl-Daniel Hailfinger git-svn-id: svn://coreboot.org/repository/coreboot-v3@678 f3766cd6-281f-0410-b1cd-43a5c92072e9 --- southbridge/amd/cs5536/cs5536.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/southbridge/amd/cs5536/cs5536.c b/southbridge/amd/cs5536/cs5536.c index 6717cdd483..f19a104686 100644 --- a/southbridge/amd/cs5536/cs5536.c +++ b/southbridge/amd/cs5536/cs5536.c @@ -602,7 +602,7 @@ static void ide_init(struct device *dev) // NOTE: Only 32-bit writes to the data buffer are allowed when PWB is set ide_cfg = pci_read_config32(dev, IDE_CFG); ide_cfg |= CHANEN | PWB; - pci_write_config8(dev, IDE_CFG, ide_cfg); + pci_write_config32(dev, IDE_CFG, ide_cfg); }