From ea9f30801822716349772157e12d943b11975521 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Fri, 27 Mar 2015 13:50:11 +0100 Subject: [PATCH] build system: normalize linker script file names We have .lb, .lds, and .ld in the tree. Go for .ld everywhere. This is inspired by the commit listed below, but rewritten to match upstream, and split in smaller pieces to keep intent clear. Change-Id: I3126af608afe4937ec4551a78df5a7824e09b04b Signed-off-by: Patrick Georgi Based-On-Change-Id: I50af7dacf616e0f8ff4c43f4acc679089ad7022b Based-On-Signed-off-by: Julius Werner Based-On-Reviewed-on: https://chromium-review.googlesource.com/219170 Reviewed-on: http://review.coreboot.org/9107 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer Reviewed-by: Paul Menzel --- src/arch/riscv/{id.lds => id.ld} | 0 src/arch/x86/Makefile.inc | 12 ++++++------ .../{ldscript_failover.lb => ldscript_failover.ld} | 0 src/arch/x86/lib/{id.lds => id.ld} | 0 src/cpu/dmp/vortex86ex/Makefile.inc | 4 ++-- src/cpu/dmp/vortex86ex/{biosdata.lds => biosdata.ld} | 0 .../vortex86ex/{biosdata_ex.lds => biosdata_ex.ld} | 0 src/cpu/intel/fit/{fit.lds => fit.ld} | 0 src/cpu/x86/16bit/{entry16.lds => entry16.ld} | 0 src/cpu/x86/16bit/{reset16.lds => reset16.ld} | 0 src/cpu/x86/32bit/{entry32.lds => entry32.ld} | 0 src/northbridge/via/vx800/Makefile.inc | 2 +- .../via/vx800/{romstrap.lds => romstrap.ld} | 0 src/northbridge/via/vx900/Makefile.inc | 2 +- .../via/vx900/{romstrap.lds => romstrap.ld} | 0 src/southbridge/nvidia/ck804/Makefile.inc | 2 +- src/southbridge/nvidia/ck804/nic.c | 2 +- .../nvidia/ck804/{romstrap.lds => romstrap.ld} | 0 src/southbridge/nvidia/mcp55/Makefile.inc | 2 +- src/southbridge/nvidia/mcp55/nic.c | 2 +- .../nvidia/mcp55/{romstrap.lds => romstrap.ld} | 0 src/southbridge/sis/sis966/Makefile.inc | 2 +- .../sis/sis966/{romstrap.lds => romstrap.ld} | 0 src/southbridge/via/k8t890/Makefile.inc | 2 +- .../via/k8t890/{romstrap.lds => romstrap.ld} | 0 25 files changed, 16 insertions(+), 16 deletions(-) rename src/arch/riscv/{id.lds => id.ld} (100%) rename src/arch/x86/init/{ldscript_failover.lb => ldscript_failover.ld} (100%) rename src/arch/x86/lib/{id.lds => id.ld} (100%) rename src/cpu/dmp/vortex86ex/{biosdata.lds => biosdata.ld} (100%) rename src/cpu/dmp/vortex86ex/{biosdata_ex.lds => biosdata_ex.ld} (100%) rename src/cpu/intel/fit/{fit.lds => fit.ld} (100%) rename src/cpu/x86/16bit/{entry16.lds => entry16.ld} (100%) rename src/cpu/x86/16bit/{reset16.lds => reset16.ld} (100%) rename src/cpu/x86/32bit/{entry32.lds => entry32.ld} (100%) rename src/northbridge/via/vx800/{romstrap.lds => romstrap.ld} (100%) rename src/northbridge/via/vx900/{romstrap.lds => romstrap.ld} (100%) rename src/southbridge/nvidia/ck804/{romstrap.lds => romstrap.ld} (100%) rename src/southbridge/nvidia/mcp55/{romstrap.lds => romstrap.ld} (100%) rename src/southbridge/sis/sis966/{romstrap.lds => romstrap.ld} (100%) rename src/southbridge/via/k8t890/{romstrap.lds => romstrap.ld} (100%) diff --git a/src/arch/riscv/id.lds b/src/arch/riscv/id.ld similarity index 100% rename from src/arch/riscv/id.lds rename to src/arch/riscv/id.ld diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 5d49abc1bb..175a767e51 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -72,13 +72,13 @@ $(obj)/cmos_layout.bin: $(NVRAMTOOL) $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.l ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32),y) -bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb -bootblock_lds += $(src)/cpu/x86/16bit/entry16.lds -bootblock_lds += $(src)/cpu/x86/16bit/reset16.lds -bootblock_lds += $(src)/arch/x86/lib/id.lds +bootblock_lds = $(src)/arch/x86/init/ldscript_failover.ld +bootblock_lds += $(src)/cpu/x86/16bit/entry16.ld +bootblock_lds += $(src)/cpu/x86/16bit/reset16.ld +bootblock_lds += $(src)/arch/x86/lib/id.ld bootblock_lds += $(chipset_bootblock_lds) ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y) -bootblock_lds += $(src)/cpu/intel/fit/fit.lds +bootblock_lds += $(src)/cpu/intel/fit/fit.ld endif bootblock_inc = $(src)/arch/x86/init/prologue.inc @@ -141,7 +141,7 @@ crt0s = $(src)/arch/x86/init/prologue.inc ldscripts = ldscripts += $(src)/arch/x86/init/romstage.ld crt0s += $(src)/cpu/x86/32bit/entry32.inc -ldscripts += $(src)/cpu/x86/32bit/entry32.lds +ldscripts += $(src)/cpu/x86/32bit/entry32.ld crt0s += $(src)/cpu/x86/fpu_enable.inc ifeq ($(CONFIG_SSE),y) diff --git a/src/arch/x86/init/ldscript_failover.lb b/src/arch/x86/init/ldscript_failover.ld similarity index 100% rename from src/arch/x86/init/ldscript_failover.lb rename to src/arch/x86/init/ldscript_failover.ld diff --git a/src/arch/x86/lib/id.lds b/src/arch/x86/lib/id.ld similarity index 100% rename from src/arch/x86/lib/id.lds rename to src/arch/x86/lib/id.ld diff --git a/src/cpu/dmp/vortex86ex/Makefile.inc b/src/cpu/dmp/vortex86ex/Makefile.inc index ff0b58ce1d..c68bf9e066 100644 --- a/src/cpu/dmp/vortex86ex/Makefile.inc +++ b/src/cpu/dmp/vortex86ex/Makefile.inc @@ -25,7 +25,7 @@ subdirs-y += ../../x86/smm chipset_bootblock_inc += $(src)/cpu/dmp/vortex86ex/biosdata.inc chipset_bootblock_inc += $(src)/cpu/dmp/vortex86ex/biosdata_ex.inc -chipset_bootblock_lds += $(src)/cpu/dmp/vortex86ex/biosdata.lds -chipset_bootblock_lds += $(src)/cpu/dmp/vortex86ex/biosdata_ex.lds +chipset_bootblock_lds += $(src)/cpu/dmp/vortex86ex/biosdata.ld +chipset_bootblock_lds += $(src)/cpu/dmp/vortex86ex/biosdata_ex.ld ROMCCFLAGS := -mcpu=i386 -O2 diff --git a/src/cpu/dmp/vortex86ex/biosdata.lds b/src/cpu/dmp/vortex86ex/biosdata.ld similarity index 100% rename from src/cpu/dmp/vortex86ex/biosdata.lds rename to src/cpu/dmp/vortex86ex/biosdata.ld diff --git a/src/cpu/dmp/vortex86ex/biosdata_ex.lds b/src/cpu/dmp/vortex86ex/biosdata_ex.ld similarity index 100% rename from src/cpu/dmp/vortex86ex/biosdata_ex.lds rename to src/cpu/dmp/vortex86ex/biosdata_ex.ld diff --git a/src/cpu/intel/fit/fit.lds b/src/cpu/intel/fit/fit.ld similarity index 100% rename from src/cpu/intel/fit/fit.lds rename to src/cpu/intel/fit/fit.ld diff --git a/src/cpu/x86/16bit/entry16.lds b/src/cpu/x86/16bit/entry16.ld similarity index 100% rename from src/cpu/x86/16bit/entry16.lds rename to src/cpu/x86/16bit/entry16.ld diff --git a/src/cpu/x86/16bit/reset16.lds b/src/cpu/x86/16bit/reset16.ld similarity index 100% rename from src/cpu/x86/16bit/reset16.lds rename to src/cpu/x86/16bit/reset16.ld diff --git a/src/cpu/x86/32bit/entry32.lds b/src/cpu/x86/32bit/entry32.ld similarity index 100% rename from src/cpu/x86/32bit/entry32.lds rename to src/cpu/x86/32bit/entry32.ld diff --git a/src/northbridge/via/vx800/Makefile.inc b/src/northbridge/via/vx800/Makefile.inc index 39ebdbd998..19638802c1 100644 --- a/src/northbridge/via/vx800/Makefile.inc +++ b/src/northbridge/via/vx800/Makefile.inc @@ -24,4 +24,4 @@ ramstage-y += lpc.c ramstage-y += ide.c chipset_bootblock_inc += $(src)/northbridge/via/vx800/romstrap.inc -chipset_bootblock_lds += $(src)/northbridge/via/vx800/romstrap.lds +chipset_bootblock_lds += $(src)/northbridge/via/vx800/romstrap.ld diff --git a/src/northbridge/via/vx800/romstrap.lds b/src/northbridge/via/vx800/romstrap.ld similarity index 100% rename from src/northbridge/via/vx800/romstrap.lds rename to src/northbridge/via/vx800/romstrap.ld diff --git a/src/northbridge/via/vx900/Makefile.inc b/src/northbridge/via/vx900/Makefile.inc index 15fd859210..85282ddcdc 100644 --- a/src/northbridge/via/vx900/Makefile.inc +++ b/src/northbridge/via/vx900/Makefile.inc @@ -45,4 +45,4 @@ ramstage-y += ./../../../drivers/pc80/vga/vga_io.c chipset_bootblock_inc += $(src)/northbridge/via/vx900/romstrap.inc -chipset_bootblock_lds += $(src)/northbridge/via/vx900/romstrap.lds +chipset_bootblock_lds += $(src)/northbridge/via/vx900/romstrap.ld diff --git a/src/northbridge/via/vx900/romstrap.lds b/src/northbridge/via/vx900/romstrap.ld similarity index 100% rename from src/northbridge/via/vx900/romstrap.lds rename to src/northbridge/via/vx900/romstrap.ld diff --git a/src/southbridge/nvidia/ck804/Makefile.inc b/src/southbridge/nvidia/ck804/Makefile.inc index db145d08a8..dacfc9c8c5 100644 --- a/src/southbridge/nvidia/ck804/Makefile.inc +++ b/src/southbridge/nvidia/ck804/Makefile.inc @@ -20,4 +20,4 @@ ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c romstage-y += early_smbus.c chipset_bootblock_inc += $(src)/southbridge/nvidia/ck804/romstrap.inc -chipset_bootblock_lds += $(src)/southbridge/nvidia/ck804/romstrap.lds +chipset_bootblock_lds += $(src)/southbridge/nvidia/ck804/romstrap.ld diff --git a/src/southbridge/nvidia/ck804/nic.c b/src/southbridge/nvidia/ck804/nic.c index b827dcffd4..1207a95419 100644 --- a/src/southbridge/nvidia/ck804/nic.c +++ b/src/southbridge/nvidia/ck804/nic.c @@ -90,7 +90,7 @@ static void nic_init(struct device *dev) /* If that is invalid we will read that from romstrap. */ if (!eeprom_valid) { u32 *mac_pos; - mac_pos = (u32 *)0xffffffd0; /* See romstrap.inc and romstrap.lds. */ + mac_pos = (u32 *)0xffffffd0; /* See romstrap.inc and romstrap.ld. */ mac_l = read32(mac_pos) + nic_index; mac_h = read32(mac_pos + 1); } diff --git a/src/southbridge/nvidia/ck804/romstrap.lds b/src/southbridge/nvidia/ck804/romstrap.ld similarity index 100% rename from src/southbridge/nvidia/ck804/romstrap.lds rename to src/southbridge/nvidia/ck804/romstrap.ld diff --git a/src/southbridge/nvidia/mcp55/Makefile.inc b/src/southbridge/nvidia/mcp55/Makefile.inc index 03a34eb71c..b4dc460b59 100644 --- a/src/southbridge/nvidia/mcp55/Makefile.inc +++ b/src/southbridge/nvidia/mcp55/Makefile.inc @@ -19,4 +19,4 @@ romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c chipset_bootblock_inc += $(src)/southbridge/nvidia/mcp55/romstrap.inc -chipset_bootblock_lds += $(src)/southbridge/nvidia/mcp55/romstrap.lds +chipset_bootblock_lds += $(src)/southbridge/nvidia/mcp55/romstrap.ld diff --git a/src/southbridge/nvidia/mcp55/nic.c b/src/southbridge/nvidia/mcp55/nic.c index 136d060d0b..d8f691af14 100644 --- a/src/southbridge/nvidia/mcp55/nic.c +++ b/src/southbridge/nvidia/mcp55/nic.c @@ -162,7 +162,7 @@ static void nic_init(struct device *dev) // if that is invalid we will read that from romstrap if(!eeprom_valid) { u32 *mac_pos; - mac_pos = (u32 *)0xffffffd0; // refer to romstrap.inc and romstrap.lds + mac_pos = (u32 *)0xffffffd0; // refer to romstrap.inc and romstrap.ld mac_l = read32(mac_pos) + nic_index; // overflow? mac_h = read32(mac_pos + 1); diff --git a/src/southbridge/nvidia/mcp55/romstrap.lds b/src/southbridge/nvidia/mcp55/romstrap.ld similarity index 100% rename from src/southbridge/nvidia/mcp55/romstrap.lds rename to src/southbridge/nvidia/mcp55/romstrap.ld diff --git a/src/southbridge/sis/sis966/Makefile.inc b/src/southbridge/sis/sis966/Makefile.inc index 1a9ea65429..5c696222d9 100644 --- a/src/southbridge/sis/sis966/Makefile.inc +++ b/src/southbridge/sis/sis966/Makefile.inc @@ -14,4 +14,4 @@ romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c chipset_bootblock_inc += $(src)/southbridge/sis/sis966/romstrap.inc -chipset_bootblock_lds += $(src)/southbridge/sis/sis966/romstrap.lds +chipset_bootblock_lds += $(src)/southbridge/sis/sis966/romstrap.ld diff --git a/src/southbridge/sis/sis966/romstrap.lds b/src/southbridge/sis/sis966/romstrap.ld similarity index 100% rename from src/southbridge/sis/sis966/romstrap.lds rename to src/southbridge/sis/sis966/romstrap.ld diff --git a/src/southbridge/via/k8t890/Makefile.inc b/src/southbridge/via/k8t890/Makefile.inc index 6d9407d03b..1c5ff3fefa 100644 --- a/src/southbridge/via/k8t890/Makefile.inc +++ b/src/southbridge/via/k8t890/Makefile.inc @@ -9,4 +9,4 @@ ramstage-y += error.c ramstage-y += chrome.c chipset_bootblock_inc += $(src)/southbridge/via/k8t890/romstrap.inc -chipset_bootblock_lds += $(src)/southbridge/via/k8t890/romstrap.lds +chipset_bootblock_lds += $(src)/southbridge/via/k8t890/romstrap.ld diff --git a/src/southbridge/via/k8t890/romstrap.lds b/src/southbridge/via/k8t890/romstrap.ld similarity index 100% rename from src/southbridge/via/k8t890/romstrap.lds rename to src/southbridge/via/k8t890/romstrap.ld