UPSTREAM: AGESA f14: Consolidate early P-states setting

BUG=None
BRANCH=None
TEST=None

Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17564
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: I3feed296b6ff9908e783c1221a8f61d9c548fef4
Reviewed-on: https://chromium-review.googlesource.com/415603
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/cpu/amd/agesa/family14/fixme.c

@@ -98,6 +98,10 @@ void amd_initmmio(void)
 	LibAmdMsrWrite (0x20C, &MsrReg, &StdHeader);
 	MsrReg = ((1ULL << CONFIG_CPU_ADDR_BITS) - CACHE_ROM_SIZE) | MTRR_PHYS_MASK_VALID;
 	LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader);
+
+	/* Set P-state 0 (1600 MHz) early to save a few ms of boot time */
+	MsrReg = 0;
+	LibAmdMsrWrite (0xC0010062, &MsrReg, &StdHeader);
 }
 
 void amd_initenv(void)

src/mainboard/amd/inagua/romstage.c

@@ -40,10 +40,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	u32 val;
 
-	/* all cores: set pstate 0 (1600 MHz) early to save a few ms of boot time
-	 */
-	__writemsr (0xc0010062, 0);
-
 	amd_initmmio();
 
 	if (!cpu_init_detectedx && boot_cpu()) {

src/mainboard/amd/persimmon/romstage.c

@@ -46,9 +46,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	u32 val;
 
-	/* All cores: set pstate 0 (1600 MHz) early to save a few ms of boot time */
-	__writemsr (0xc0010062, 0);
-
 	amd_initmmio();
 
 	if (!cpu_init_detectedx && boot_cpu()) {

src/mainboard/amd/south_station/romstage.c

@@ -41,9 +41,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	u32 val;
 
-	/* All cores: set pstate 0 (1600 MHz) early to save a few ms of boot time */
-	__writemsr (0xc0010062, 0);
-
 	amd_initmmio();
 
 	if (!cpu_init_detectedx && boot_cpu()) {

src/mainboard/asrock/e350m1/romstage.c

@@ -43,9 +43,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	u32 val;
 
-	/* All cores: set pstate 0 (1600 MHz) early to save a few ms of boot time */
-	__writemsr(0xc0010062, 0);
-
 	amd_initmmio();
 
 	if (!cpu_init_detectedx && boot_cpu()) {

src/mainboard/elmex/pcm205400/romstage.c

@@ -46,9 +46,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	u32 val;
 
-	/* All cores: set pstate 0 (1600 MHz) early to save a few ms of boot time */
-	__writemsr (0xc0010062, 0);
-
 	amd_initmmio();
 
 	if (!cpu_init_detectedx && boot_cpu()) {

src/mainboard/gizmosphere/gizmo/romstage.c

@@ -37,21 +37,9 @@
 #include <cpu/amd/mtrr.h>
 #include <cpu/amd/agesa/s3_resume.h>
 
-#define MSR_MTRR_VARIABLE_BASE6   0x020C
-#define MSR_MTRR_VARIABLE_MASK6   0x020D
-#define MSR_PSTATE_CONTROL        0xC0010062
-
-
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	u32 val;
-	msr_t msr;
-
-
-	/* All cores: set pstate 0 (1600 MHz) early to save a few ms of boot time */
-	msr.lo = 0;
-	msr.hi = 0;
-	wrmsr (MSR_PSTATE_CONTROL, msr);
 
 	amd_initmmio();
 

src/mainboard/jetway/nf81-t56n-lf/romstage.c

@@ -62,9 +62,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	u32 val;
 
-	/* All cores: set pstate 0 (1600 MHz) early to save a few ms of boot time */
-	__writemsr (0xc0010062, 0);
-
 	amd_initmmio();
 
 	if (!cpu_init_detectedx && boot_cpu()) {

src/mainboard/lippert/frontrunner-af/romstage.c

@@ -45,9 +45,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	u32 val;
 
-	/* All cores: set pstate 0 (1600 MHz) early to save a few ms of boot time */
-	__writemsr (0xc0010062, 0);
-
 	amd_initmmio();
 
 	if (!cpu_init_detectedx && boot_cpu()) {

src/mainboard/lippert/toucan-af/romstage.c

@@ -46,9 +46,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	u32 val;
 
-	/* All cores: set pstate 0 (1600 MHz) early to save a few ms of boot time */
-	__writemsr (0xc0010062, 0);
-
 	amd_initmmio();
 
 	if (!cpu_init_detectedx && boot_cpu()) {

src/mainboard/pcengines/apu1/romstage.c

@@ -51,9 +51,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	u32 val;
 
-	/* All cores: set pstate 0 (1600 MHz) early to save a few ms of boot time */
-	__writemsr (0xc0010062, 0);
-
 	amd_initmmio();
 
 	if (!cpu_init_detectedx && boot_cpu()) {