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UPSTREAM: mb/emulation/*-riscv: Don't select ARCH_BOOTBLOCK_RISCV

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It's already selected by SOC_UCB_RISCV.

BUG=none
BRANCH=none
TEST=none

Change-Id: I8e727751dfcbbba9bb0a70fe14354deffc02a75f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: c706eaf068
Original-Change-Id: Ic8a14300cdea2a4ab763b2746434891b72843604
Original-Signed-off-by: Jonathan Neuschfer <j.neuschaefer@gmx.net>
Original-Reviewed-on: https://review.coreboot.org/18390
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/446388
This commit is contained in:
Jonathan Neuschäfer 2017-02-17 18:06:33 +01:00 • committed by chrome-bot
parent 81afd5521f
commit e9749c4d66
2 changed files with 0 additions and 2 deletions
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1
src/mainboard/emulation/qemu-riscv/Kconfig
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@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select SOC_UCB_RISCV
select BOARD_ROMSIZE_KB_4096
select ARCH_BOOTBLOCK_RISCV
select HAVE_UART_SPECIAL
select BOOT_DEVICE_NOT_SPI_FLASH

1
src/mainboard/emulation/spike-riscv/Kconfig
View file

@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select SOC_UCB_RISCV
select BOARD_ROMSIZE_KB_4096
select ARCH_BOOTBLOCK_RISCV
select DRIVERS_UART_8250MEM
select BOOT_DEVICE_NOT_SPI_FLASH