mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
Patches for tyson that do the following:
Added set_initrd() to params.h and params.c. Added PRINTK macro and KERN_SPEW to printk.h. Changed fill_inbuf.c to accept zkernel_start and zknernel_mask as variables that can be set by linuxbiosmain(). Changed linuxbiosmain() to allow custom code to modify some parameters such as where the kernel image is located in ROM, the initrd parameters and the command line. Change most of the DBG's in newpci.c to PRINTK(KERN_SPEW... This was the worst offender when DEBUG was defined. Some of it was changed to KERN_DEBUG. There are no new files this time, however, freebios-010214.orig/src/superio/SMC/fdc37n769/superio.inc remains and needs to be deleted and then 'cvs rm'. None of these changes should break any other code. The same ZKERNEL_START, ZKERNEL_MASK and CMD_LINE defines are still used, but are now all used in linuxbiosmain() and used to initialize variables that can later be changed rather than used directly. These changes allow me to choose between two kernel images, optionally use an initrd image, load the initrd image and set the kernel command line as needed.
This commit is contained in:
parent
008d0a742a
commit
e94eeb3d9d
5 changed files with 92 additions and 46 deletions
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@ -8,3 +8,7 @@ void set_command_line(unsigned char *empty_zero_page,
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unsigned char *cmdline);
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unsigned char *get_empty_zero_page(void);
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void set_display(unsigned char *empty_zero_page, int rows, int cols);
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void set_initrd(unsigned char *empty_zero_page,
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unsigned long start,
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unsigned long size);
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@ -11,14 +11,17 @@
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#define KERN_NOTICE "<5>" /* normal but significant condition */
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#define KERN_INFO "<6>" /* informational */
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#define KERN_DEBUG "<7>" /* debug-level messages */
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#define KERN_SPEW "<8>" /* Way too many details */
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extern int console_loglevel;
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int printk(const char *fmt, ...);
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#ifdef DEBUG
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#define DBG(x...) printk(KERN_DEBUG x)
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#define PRINTK(x...) printk(x)
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#else
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#define DBG(x...)
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#define PRINTK(x...)
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#endif
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#endif
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@ -1480,12 +1480,18 @@ void setup_apic()
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}
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}
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unsigned char *zkernel_start;
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unsigned long zkernel_mask;
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int
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linuxbiosmain(unsigned long base, unsigned long totalram)
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{
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unsigned char *empty_zero_page;
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extern int firstfill;
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unsigned char *cmd_line;
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unsigned long initrd_start, initrd_size;
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/* common globals -- don't rely on init! */
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insize = 0;
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inptr = 0;
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@ -1502,6 +1508,36 @@ linuxbiosmain(unsigned long base, unsigned long totalram)
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printk("Version 0.1\n");
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printk("\n");
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initrd_start = 0;
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initrd_size = 0;
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#ifdef CMD_LINE
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cmd_line = CMD_LINE;
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#else
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cmd_line = "root=/dev/hda1 single";
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#endif
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#ifdef ZKERNEL_START
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zkernel_start = (unsigned char *)ZKERNEL_START;
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#else
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zkernel_start = (unsigned char *)0xfff80000;
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#endif
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#ifdef ZKERNEL_MASK
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zkernel_mask = ZKERNEL_MASK;
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#else
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zkernel_mask = 0x0000ffff;
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#endif
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#ifdef LOADER_SETUP
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loader_setup(base,
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totalram,
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&initrd_start,
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&initrd_size,
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&cmd_line,
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&zkernel_start,
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&zkernel_mask);
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#endif
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setup_output_buffer();
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DBG("Making CRC\n");
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@ -1532,16 +1568,13 @@ linuxbiosmain(unsigned long base, unsigned long totalram)
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*/
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set_memory_size(empty_zero_page, 0x3c00, totalram - 2048);
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intel_post(0xfa);
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#ifdef CMD_LINE
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DBG("using custom command line - [%s]\n", CMD_LINE);
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#else
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#define CMD_LINE "root=/dev/hda1 single"
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DBG("using default command line - [%s]\n", CMD_LINE);
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#endif
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set_command_line(empty_zero_page, CMD_LINE);
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PRINTK(KERN_NOTICE "command line - [%s]\n", cmd_line);
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set_command_line(empty_zero_page, cmd_line);
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set_root_rdonly(empty_zero_page);
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set_display(empty_zero_page, 25, 80);
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set_initrd(empty_zero_page, initrd_start, initrd_size);
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/* set up the IO-APIC for the clock interrupt. */
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/* this needs to move to intel_main.c at some point. */
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@ -267,7 +267,7 @@ int pci_read_config_byte(struct pci_dev *dev, u8 where, u8 * val)
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{
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int res;
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res = conf->read_byte(dev->bus->number, dev->devfn, where, val);
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DBG("Read config byte bus %d,devfn 0x%x,reg 0x%x,val 0x%x,res 0x%x\n",
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PRINTK(KERN_SPEW "Read config byte bus %d,devfn 0x%x,reg 0x%x,val 0x%x,res 0x%x\n",
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dev->bus->number, dev->devfn, where, *val, res);
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return res;
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@ -278,7 +278,7 @@ int pci_read_config_word(struct pci_dev *dev, u8 where, u16 * val)
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{
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int res;
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res = conf->read_word(dev->bus->number, dev->devfn, where, val);
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DBG("Read config word bus %d,devfn 0x%x,reg 0x%x,val 0x%x,res 0x%x\n",
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PRINTK(KERN_SPEW "Read config word bus %d,devfn 0x%x,reg 0x%x,val 0x%x,res 0x%x\n",
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dev->bus->number, dev->devfn, where, *val, res);
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return res;
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}
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@ -287,21 +287,21 @@ int pci_read_config_dword(struct pci_dev *dev, u8 where, u32 * val)
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{
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int res;
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res = conf->read_dword(dev->bus->number, dev->devfn, where, val);
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DBG("Read config dword bus %d,devfn 0x%x,reg 0x%x,val 0x%x,res 0x%x\n",
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PRINTK(KERN_SPEW "Read config dword bus %d,devfn 0x%x,reg 0x%x,val 0x%x,res 0x%x\n",
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dev->bus->number, dev->devfn, where, *val, res);
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return res;
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}
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int pci_write_config_byte(struct pci_dev *dev, u8 where, u8 val)
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{
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DBG("Write config byte bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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PRINTK(KERN_SPEW "Write config byte bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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dev->bus->number, dev->devfn, where, val);
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return conf->write_byte(dev->bus->number, dev->devfn, where, val);
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}
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int pci_write_config_word(struct pci_dev *dev, u8 where, u16 val)
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{
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DBG("Write config word bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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PRINTK(KERN_SPEW "Write config word bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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dev->bus->number, dev->devfn, where, val);
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return conf->write_word(dev->bus->number, dev->devfn, where, val);
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@ -309,7 +309,7 @@ int pci_write_config_word(struct pci_dev *dev, u8 where, u16 val)
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int pci_write_config_dword(struct pci_dev *dev, u8 where, u32 val)
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{
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DBG("Write config dword bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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PRINTK(KERN_SPEW "Write config dword bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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dev->bus->number, dev->devfn, where, val);
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return conf->write_dword(dev->bus->number, dev->devfn, where, val);
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}
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@ -318,7 +318,7 @@ int pcibios_read_config_byte(unsigned char bus, unsigned char devfn, u8 where, u
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{
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int res;
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res = conf->read_byte(bus, devfn, where, val);
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DBG("Read config byte bus %d,devfn 0x%x,reg 0x%x,val 0x%x,res 0x%x\n",
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PRINTK(KERN_SPEW "Read config byte bus %d,devfn 0x%x,reg 0x%x,val 0x%x,res 0x%x\n",
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bus, devfn, where, *val, res);
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return res;
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}
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@ -327,7 +327,7 @@ int pcibios_read_config_word(unsigned char bus, unsigned char devfn, u8 where, u
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{
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int res;
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res = conf->read_word(bus, devfn, where, val);
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DBG("Read config word bus %d,devfn 0x%x,reg 0x%x,val 0x%x,res 0x%x\n",
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PRINTK(KERN_SPEW "Read config word bus %d,devfn 0x%x,reg 0x%x,val 0x%x,res 0x%x\n",
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bus, devfn, where, *val, res);
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return res;
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@ -337,7 +337,7 @@ int pcibios_read_config_dword(unsigned char bus, unsigned char devfn, u8 where,
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{
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int res;
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res = conf->read_dword(bus, devfn, where, val);
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DBG("Read config dword bus %d,devfn 0x%x,reg 0x%x,val 0x%x,res 0x%x\n",
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PRINTK(KERN_SPEW "Read config dword bus %d,devfn 0x%x,reg 0x%x,val 0x%x,res 0x%x\n",
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bus, devfn, where, *val, res);
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return res;
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@ -345,7 +345,7 @@ int pcibios_read_config_dword(unsigned char bus, unsigned char devfn, u8 where,
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int pcibios_write_config_byte(unsigned char bus, unsigned char devfn, u8 where, u8 val)
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{
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DBG("Write byte bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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PRINTK(KERN_SPEW "Write byte bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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bus, devfn, where, val);
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return conf->write_byte(bus, devfn, where, val);
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@ -353,7 +353,7 @@ int pcibios_write_config_byte(unsigned char bus, unsigned char devfn, u8 where,
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int pcibios_write_config_word(unsigned char bus, unsigned char devfn, u8 where, u16 val)
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{
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DBG("Write word bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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PRINTK(KERN_SPEW "Write word bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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bus, devfn, where, val);
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return conf->write_word(bus, devfn, where, val);
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@ -361,7 +361,7 @@ int pcibios_write_config_word(unsigned char bus, unsigned char devfn, u8 where,
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int pcibios_write_config_dword(unsigned char bus, unsigned char devfn, u8 where, u32 val)
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{
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DBG("Write doubleword bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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PRINTK(KERN_SPEW "Write doubleword bus %d, devfn 0x%x, reg 0x%x, val 0x%x\n",
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bus, devfn, where, val);
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return conf->write_dword(bus, devfn, where, val);
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}
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@ -449,7 +449,7 @@ void compute_allocate_io(struct pci_bus *bus)
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unsigned long io_base;
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io_base = bus->iobase;
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DBG("compute_allocate_io: base 0x%lx\n", bus->iobase);
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PRINTK(KERN_DEBUG"compute_allocate_io: base 0x%lx\n", bus->iobase);
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/* First, walk all the bridges. When you return, grow the limit of the current bus
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since sub-busses need IO rounded to 4096 */
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@ -457,7 +457,7 @@ void compute_allocate_io(struct pci_bus *bus)
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curbus->iobase = io_base;
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compute_allocate_io(curbus);
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io_base = round(curbus->iolimit, IO_BRIDGE_ALIGN);
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DBG("BUSIO: done Bridge Bus 0x%x, iobase now 0x%lx\n",
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PRINTK(KERN_DEBUG"BUSIO: done Bridge Bus 0x%x, iobase now 0x%lx\n",
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curbus->number, io_base);
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}
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@ -470,7 +470,7 @@ void compute_allocate_io(struct pci_bus *bus)
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if (!iosize)
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continue;
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DBG("DEVIO: Bus 0x%x, devfn 0x%x, reg 0x%x: "
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PRINTK(KERN_DEBUG"DEVIO: Bus 0x%x, devfn 0x%x, reg 0x%x: "
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"iosize 0x%lx\n",
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curdev->bus->number, curdev->devfn, i, iosize);
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curdev->base_address[i] = io_base;
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@ -478,7 +478,7 @@ void compute_allocate_io(struct pci_bus *bus)
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// (e.g. VIA 82c686a.) So set it to be safe)
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curdev->base_address[i] |=
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PCI_BASE_ADDRESS_SPACE_IO;
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DBG("-->set base to 0x%lx\n", io_base);
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PRINTK(KERN_DEBUG"-->set base to 0x%lx\n", io_base);
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io_base += round(iosize, IO_ALIGN);
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curdev->command |= PCI_COMMAND_IO;
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}
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@ -486,7 +486,7 @@ void compute_allocate_io(struct pci_bus *bus)
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}
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bus->iolimit = iolimit(io_base);
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DBG("BUS %d: set iolimit to 0x%lx\n", bus->number, bus->iolimit);
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PRINTK(KERN_DEBUG"BUS %d: set iolimit to 0x%lx\n", bus->number, bus->iolimit);
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}
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/** Compute and allocate the memory for this bus.
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@ -500,7 +500,7 @@ void compute_allocate_mem(struct pci_bus *bus)
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unsigned long mem_base;
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mem_base = bus->membase;
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DBG("compute_allocate_mem: base 0x%lx\n", bus->membase);
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PRINTK(KERN_DEBUG"compute_allocate_mem: base 0x%lx\n", bus->membase);
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/* First, walk all the bridges. When you return, grow the limit of the current bus
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since sub-busses need MEMORY rounded to 1 Mega */
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@ -508,7 +508,7 @@ void compute_allocate_mem(struct pci_bus *bus)
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curbus->membase = mem_base;
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compute_allocate_mem(curbus);
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mem_base = round(curbus->memlimit, ONEMEG);
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DBG("BUSMEM: Bridge Bus 0x%x,membase now 0x%lx\n",
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PRINTK(KERN_DEBUG"BUSMEM: Bridge Bus 0x%x,membase now 0x%lx\n",
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curbus->number, mem_base);
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}
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@ -549,11 +549,11 @@ void compute_allocate_mem(struct pci_bus *bus)
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consumed in 4KB unit */
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regmem = round(memorysize, MEM_ALIGN);
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mem_base = round(mem_base, regmem);
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DBG("DEVMEM: Bus 0x%x, devfn 0x%x, reg 0x%x: "
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PRINTK(KERN_DEBUG"DEVMEM: Bus 0x%x, devfn 0x%x, reg 0x%x: "
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"memsize 0x%lx\n",
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curdev->bus->number, curdev->devfn, i, regmem);
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curdev->base_address[i] = mem_base;
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DBG("-->set base to 0x%lx\n", mem_base);
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PRINTK(KERN_DEBUG"-->set base to 0x%lx\n", mem_base);
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mem_base += regmem;
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curdev->command |= PCI_COMMAND_MEMORY;
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// for 64-bit BARs, the odd ones don't count
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@ -565,7 +565,7 @@ void compute_allocate_mem(struct pci_bus *bus)
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}
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bus->memlimit = memlimit(mem_base);
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DBG("BUS %d: set memlimit to 0x%lx\n", bus->number, bus->memlimit);
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PRINTK(KERN_DEBUG"BUS %d: set memlimit to 0x%lx\n", bus->number, bus->memlimit);
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}
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/** Compute and allocate the prefetch memory for this bus.
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@ -579,7 +579,7 @@ void compute_allocate_prefmem(struct pci_bus *bus)
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unsigned long prefmem_base;
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prefmem_base = bus->prefmembase;
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DBG("Compute_allocate_prefmem: base 0x%lx\n", bus->prefmembase);
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PRINTK(KERN_DEBUG"Compute_allocate_prefmem: base 0x%lx\n", bus->prefmembase);
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/* First, walk all the bridges. When you return, grow the limit of the current bus
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since sub-busses need MEMORY rounded to 1 Mega */
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@ -587,7 +587,7 @@ void compute_allocate_prefmem(struct pci_bus *bus)
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curbus->prefmembase = prefmem_base;
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compute_allocate_prefmem(curbus);
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prefmem_base = round(curbus->prefmemlimit, ONEMEG);
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DBG("BUSPREFMEM: Bridge Bus 0x%x, prefmem base now 0x%lx\n",
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PRINTK(KERN_DEBUG"BUSPREFMEM: Bridge Bus 0x%x, prefmem base now 0x%lx\n",
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curbus->number, prefmem_base);
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}
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@ -627,11 +627,11 @@ void compute_allocate_prefmem(struct pci_bus *bus)
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consumed in 4KB unit */
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regmem = round(memorysize, MEM_ALIGN);
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prefmem_base = round(prefmem_base, regmem);
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DBG("DEVPREFMEM: Bus 0x%x, devfn 0x%x, reg 0x%x: "
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PRINTK(KERN_DEBUG"DEVPREFMEM: Bus 0x%x, devfn 0x%x, reg 0x%x: "
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"prefmemsize 0x%lx\n",
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curdev->bus->number, curdev->devfn, i, regmem);
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curdev->base_address[i] = prefmem_base;
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DBG("-->set base to 0x%lx\n", prefmem_base);
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PRINTK(KERN_DEBUG"-->set base to 0x%lx\n", prefmem_base);
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prefmem_base += regmem;
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curdev->command |= PCI_COMMAND_MEMORY;
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// for 64-bit BARs, the odd ones don't count
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@ -642,7 +642,7 @@ void compute_allocate_prefmem(struct pci_bus *bus)
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}
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bus->prefmemlimit = memlimit(prefmem_base);
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DBG("BUS %d: set prefmemlimit to 0x%lx\n", bus->number, bus->prefmemlimit);
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PRINTK(KERN_DEBUG"BUS %d: set prefmemlimit to 0x%lx\n", bus->number, bus->prefmemlimit);
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}
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/** Compute and allocate resources.
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@ -653,16 +653,16 @@ void compute_allocate_prefmem(struct pci_bus *bus)
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*/
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void compute_allocate_resources(struct pci_bus *bus)
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{
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DBG("COMPUTE_ALLOCATE: do IO\n");
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PRINTK(KERN_DEBUG"COMPUTE_ALLOCATE: do IO\n");
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compute_allocate_io(bus);
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DBG("COMPUTE_ALLOCATE: do MEM\n");
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PRINTK(KERN_DEBUG"COMPUTE_ALLOCATE: do MEM\n");
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compute_allocate_mem(bus);
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// now put the prefetchable memory at the end of the memory
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bus->prefmembase = round(bus->memlimit, ONEMEG);
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DBG("COMPUTE_ALLOCATE: do PREFMEM\n");
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||||
PRINTK(KERN_DEBUG"COMPUTE_ALLOCATE: do PREFMEM\n");
|
||||
compute_allocate_prefmem(bus);
|
||||
}
|
||||
|
||||
|
@ -676,7 +676,7 @@ void assign_resources(struct pci_bus *bus)
|
|||
struct pci_dev *curdev = pci_devices;
|
||||
struct pci_bus *curbus;
|
||||
|
||||
DBG("ASSIGN RESOURCES, bus %d\n", bus->number);
|
||||
PRINTK(KERN_DEBUG"ASSIGN RESOURCES, bus %d\n", bus->number);
|
||||
|
||||
/* wlak trhough all the buses, assign resources for bridges */
|
||||
for (curbus = bus->children; curbus; curbus = curbus->next) {
|
||||
|
@ -690,7 +690,7 @@ void assign_resources(struct pci_bus *bus)
|
|||
curbus->iobase >> 8);
|
||||
pci_write_config_byte(curbus->self, PCI_IO_LIMIT,
|
||||
curbus->iolimit >> 8);
|
||||
DBG("Bus 0x%x iobase to 0x%x iolimit 0x%x\n",
|
||||
PRINTK(KERN_DEBUG"Bus 0x%x iobase to 0x%x iolimit 0x%x\n",
|
||||
bus->number, curbus->iobase, curbus->iolimit);
|
||||
}
|
||||
|
||||
|
@ -701,7 +701,7 @@ void assign_resources(struct pci_bus *bus)
|
|||
curbus->membase >> 16);
|
||||
pci_write_config_word(curbus->self, PCI_MEMORY_LIMIT,
|
||||
curbus->memlimit >> 16);
|
||||
DBG("Bus 0x%x membase to 0x%x memlimit 0x%x\n",
|
||||
PRINTK(KERN_DEBUG"Bus 0x%x membase to 0x%x memlimit 0x%x\n",
|
||||
bus->number, curbus->membase, curbus->memlimit);
|
||||
|
||||
}
|
||||
|
@ -713,7 +713,7 @@ void assign_resources(struct pci_bus *bus)
|
|||
curbus->prefmembase >> 16);
|
||||
pci_write_config_word(curbus->self, PCI_PREF_MEMORY_LIMIT,
|
||||
curbus->prefmemlimit >> 16);
|
||||
DBG("Bus 0x%x prefmembase to 0x%x prefmemlimit 0x%x\n",
|
||||
PRINTK(KERN_DEBUG"Bus 0x%x prefmembase to 0x%x prefmemlimit 0x%x\n",
|
||||
bus->number, curbus->prefmembase, curbus->prefmemlimit);
|
||||
|
||||
}
|
||||
|
@ -729,7 +729,7 @@ void assign_resources(struct pci_bus *bus)
|
|||
|
||||
reg = PCI_BASE_ADDRESS_0 + (i << 2);
|
||||
pci_write_config_dword(curdev, reg, curdev->base_address[i]);
|
||||
DBG("Bus 0x%x devfn 0x%x reg 0x%x base to 0x%lx\n",
|
||||
PRINTK(KERN_DEBUG"Bus 0x%x devfn 0x%x reg 0x%x base to 0x%lx\n",
|
||||
curdev->bus->number, curdev->devfn, i,
|
||||
curdev->base_address[i]);
|
||||
}
|
||||
|
@ -748,7 +748,7 @@ void enable_resources(struct pci_bus *bus)
|
|||
pci_read_config_word(curdev, PCI_COMMAND, &command);
|
||||
command |= curdev->command;
|
||||
pci_write_config_word(curdev, PCI_COMMAND, command);
|
||||
DBG("DEV Set command bus 0x%x devfn 0x%x to 0x%x\n",
|
||||
PRINTK(KERN_DEBUG"DEV Set command bus 0x%x devfn 0x%x to 0x%x\n",
|
||||
curdev->bus->number, curdev->devfn, command);
|
||||
}
|
||||
}
|
||||
|
|
|
@ -17,10 +17,12 @@
|
|||
* ror it 16 bits, and as we grow the CAS, we just inc cs, and that will
|
||||
* set the right value.
|
||||
*/
|
||||
/* SDRAM (28:27 == 10), 1st row present (26:25=11),
|
||||
* no 2nd row yet (24:23=00), 256 MB (22:20 = 110),
|
||||
* 10 bits CA (minimum for SDRAM 19:16=2), CAS3 (12:11 = 10)
|
||||
*/
|
||||
/* 0xf in high order due to other settings */
|
||||
#define INIT_MCR $0xf6621000
|
||||
#undef INIT_MCR
|
||||
/* I think that f662 is wrong. We need to make it 0xf6601000 */
|
||||
#define INIT_MCR $0xf6021000
|
||||
|
||||
#define WRITE_MCR0 movl %ecx, %eax ; outl %eax, %dx
|
||||
/*#include <cpu/p5/start32.inc>*/
|
||||
|
@ -111,6 +113,10 @@ code16
|
|||
/* clear out the CAS, since we assume start at zero
|
||||
* and increment
|
||||
*/
|
||||
/* NOTE: we set 10-bit above. If it only uses 8 bits it will
|
||||
* wrap. So it is OK that we clear out the CAS to 0
|
||||
* (WE THINK ...)
|
||||
*/
|
||||
andb $0xf0, %cl
|
||||
/* test 8 bit CAS */
|
||||
movb $0, 0
|
||||
|
|
Loading…
Add table
Reference in a new issue