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mb/google/octopus: Fix Trackpad interrupt GPIO config

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BUG=b:73137125
TEST= tested trackpad on Octopus
Change-Id: Icc416e7be4e42bda188f74c69db150ba42562128
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/25415
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Hannah Williams 2018-03-28 11:09:33 -07:00 • committed by Aaron Durbin
parent d738749d47
commit e7e35674d6
1 changed files with 2 additions and 3 deletions
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5
src/mainboard/google/octopus/variants/baseboard/gpio.c
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@ -191,7 +191,7 @@ static const struct pad_config gpio_table[] = {
// TODO Need to set HIZCRx1
PAD_CFG_GPI(GPIO_134, NONE, DEEP),/* GPIO_134 -- SD_CD_OD */
PAD_CFG_GPI_APIC_IOS(GPIO_135, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD),/* GPIO_135 -- TRACKPAD_INT1_1V8_ODL */
PAD_CFG_GPI_APIC_LOW(GPIO_135, NONE, DEEP),/* GPIO_135 -- TRACKPAD_INT1_1V8_ODL */
PAD_CFG_GPI_APIC_IOS(GPIO_136, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD),/* GPIO_136 -- PMIC_PCH_INT_ODL */
PAD_CFG_GPI_APIC_IOS(GPIO_137, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD),/* GPIO_137 -- HP_INT_ODL */
PAD_CFG_GPI(GPIO_138, NONE, DEEP),/* GPIO_138 -- PEN_PDCT_ODL */
@ -201,8 +201,7 @@ static const struct pad_config gpio_table[] = {
// Settings here do not match table
// Also we may be able to use eSPI WAKE# Virtual Wire instead
PAD_CFG_GPI_SCI_IOS(GPIO_141, UP_20K, DEEP, EDGE_SINGLE, INVERT, TxDRxE, DISPUPD),/* GPIO_141 -- EC_PCH_WAKE_ODL */
//TODO Check all pad settings. Table did not specify interrupt properties. This should be an SCI.
//PAD_CFG_NF_IOSSTATE(GPIO_142, NONE, DEEP, TxDRxE, DISPUPD),/* GPIO_142 -- TRACKPAD_INT2_1V8_ODL */
PAD_CFG_GPI_SCI_LOW(GPIO_142, NONE, DEEP, LEVEL),/* GPIO_142 -- TRACKPAD_INT2_1V8_ODL */
PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_143, 1, DEEP, UP_20K, HIZCRx1, ENPU),/* GPIO_143 -- LTE_SAR_ODL */
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_144, NONE, DEEP, NF5, HIZCRx0, DISPUPD),/* PANEL1_VDDN */
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_145, NONE, DEEP, NF5, HIZCRx0, DISPUPD),/* PANEL1_BKLTEN */