mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
Renamed main.c to hardwaremain.c
This commit is contained in:
Greg Watson
parent
39eed08e01
commit
e46c9cd680
1 changed files with 255 additions and 0 deletions
255
src/mainboard/motorola/sandpoint/hardwaremain.c
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255
src/mainboard/motorola/sandpoint/hardwaremain.c
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/* $Id$ */
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/* Copyright 2000 AG Electronics Ltd. */
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/* This code is distributed without warranty under the GPL v2 (see COPYING) */
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#include <ppc.h>
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#include <bsp.h>
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#include <printk.h>
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#include <subr.h>
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#include <pci.h>
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#include <mem.h>
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#include <version.h>
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#include <part/hard_reset.h>
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#include <boot/elf.h>
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#include <rom/read_bytes.h>
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#include <northbridge/motorola/mpc107/epic.h>
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#include "nvram.h"
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#define CPU_ENABLED 1 /* Processor is available */
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#define CPU_BOOTPROCESSOR 2 /* Processor is the BP */
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static unsigned long processor_map[MAX_CPUS];
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extern unsigned long memory_base;
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extern unsigned long memory_size;
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extern struct superio *all_superio[];
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extern int nsuperio;
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extern void handle_superio(int pass, struct superio *s[], int nsuperio);
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extern nvram_device bsp_nvram;
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extern int init_flash_amd800(char *, unsigned, unsigned);
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extern void southbridge_early_init(void);
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extern void southbridge_init(void);
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extern void sio_enable(void);
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extern unsigned long this_processors_id(void);
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extern unsigned long processor_index(unsigned long);
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extern void wait_for_other_cpus(void);
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extern void startup_other_cpus(unsigned long *);
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extern struct mem_range *getmeminfo(void);
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extern struct pci_ops pci_direct_ppc;
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void
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testram(struct mem_range *mem)
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{
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unsigned addr;
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unsigned val;
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int errors = 0;
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for ( addr = 0x0 ; addr < 0x100000; addr++)
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{
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val = *((unsigned *)addr);
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*((unsigned *)addr) = addr;
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if (*((unsigned *)addr) != addr)
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errors++;
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*((unsigned *)addr) = val;
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}
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if ( errors )
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printk_info("%d errors found\n", errors);
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else
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printk_info("no errors found\n");
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}
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static unsigned long
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cpu_initialize(struct mem_range *mem)
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{
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/* Because we busy wait at the printk spinlock.
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* It is important to keep the number of printed messages
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* from secondary cpus to a minimum, when debugging is
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* disabled.
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*/
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unsigned long processor_id = this_processors_id();
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printk_notice("Initializing CPU #%d\n", processor_id);
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#if 0
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/* Turn on caching if we haven't already */
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cache_on(mem);
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#endif
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ppc_identify();
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#if 0
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/* now that everything is really up, enable the l2 cache if desired.
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* The enable can wait until this point, because linuxbios and it's
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* data areas are tiny, easily fitting into the L1 cache.
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*/
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configure_l2_cache();
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interrupts_on();
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#endif
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printk_info("CPU #%d Initialized\n", processor_id);
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return processor_id;
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}
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#if 0
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void
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write_tables(struct mem_range *mem)
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{
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unsigned long low_table_start, low_table_end;
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unsigned long rom_table_start, rom_table_end;
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rom_table_start = 0xf0000;
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rom_table_end = 0xf0000;
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/* Start low addr at 16 bytes instead of 0 because of a buglet
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* in the generic linux unzip code, as it tests for the a20 line.
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*/
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low_table_start = 0;
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low_table_end = 16;
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post_code(0x9a);
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check_pirq_routing_table();
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/* This table must be betweeen 0xf0000 & 0x100000 */
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rom_table_end = copy_pirq_routing_table(rom_table_end);
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rom_table_end = (rom_table_end + 1023) & ~1023;
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/* copy the smp block to address 0 */
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post_code(0x96);
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/* The smp table must be in 0-1K, 639K-640K, or 960K-1M */
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remove_logical_cpus();
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low_table_end = write_smp_table(low_table_end, processor_map);
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/* Don't write anything in the traditional x86 BIOS data segment */
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if (low_table_end < 0x500) {
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low_table_end = 0x500;
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}
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/* The linuxbios table must be in 0-4K or 960K-1M */
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write_linuxbios_table(processor_map, mem,
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low_table_start, low_table_end,
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rom_table_start >> 10, rom_table_end >> 10);
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}
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#endif
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void
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hardwaremain(int boot_complete)
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{
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struct mem_range *mem, *tmem;
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unsigned long totalmem;
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unsigned long boot_cpu;
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int boot_index;
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#ifdef PPC
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//southbridge_early_init();
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sio_enable();
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#else /* PPC */
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// we don't call post code for this one -- since serial post could cause real
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// trouble.
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outb(0x38, 0x80);
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#endif /* PPC */
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/* displayinit MUST PRECEDE ALL PRINTK! */
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displayinit();
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post_code(0x39);
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printk_notice("LinuxBIOS-%s%s %s %s...\n",
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linuxbios_version, linuxbios_extra_version, linuxbios_build,
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(boot_complete)?"rebooting":"booting");
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post_code(0x40);
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/* If we have already booted attempt a hard reboot */
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if (boot_complete) {
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hard_reset();
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}
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// pick how to scan the bus. This is first so we can get at memory size.
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printk_info("Finding PCI configuration type.\n");
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#ifdef PPC
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if ( !pci_set_direct(&pci_direct_ppc) )
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{
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printk_info("Could not access PCI bus\n");
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return;
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}
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#else /* PPC */
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pci_set_method();
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#endif /* PPC */
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post_code(0x5f);
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#if 0
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enumerate_static_devices();
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#endif
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pci_enumerate();
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post_code(0x66);
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// Now do the real bus
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// we round the total ram up a lot for thing like the SISFB, which
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// shares high memory with the CPU.
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pci_configure();
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post_code(0x88);
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pci_enable();
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pci_initialize();
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post_code(0x89);
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#ifdef PPC
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mem = getmeminfo();
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#else /* PPC */
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mem = get_ramsize();
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#endif /* PPC */
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post_code(0x70);
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totalmem = 0;
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for(tmem = mem; tmem->sizek; tmem++) {
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totalmem += tmem->sizek;
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}
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printk_info("totalram: %ldM\n",
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(totalmem + 512) >> 10); /* Round to the nearest meg */
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/* Fully initialize the cpu before configuring the bus */
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boot_cpu = cpu_initialize(mem);
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boot_index = processor_index(boot_cpu);
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printk_spew("BOOT CPU is %d\n", boot_cpu);
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processor_map[boot_index] = CPU_BOOTPROCESSOR|CPU_ENABLED;
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/* Now start the other cpus initializing
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* The sooner they start the sooner they stop.
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*/
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post_code(0x75);
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startup_other_cpus(processor_map);
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post_code(0x77);
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/* make certain we are the only cpu running in linuxBIOS */
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wait_for_other_cpus();
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#ifdef PPC
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init_flash_amd800("BOOT", 0xff000000, 1);
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init_flash_amd800("BOOT", 0xff800000, 1);
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southbridge_init();
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nvram_init(&bsp_nvram);
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handle_superio(0, all_superio, nsuperio);
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handle_superio(1, all_superio, nsuperio);
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handle_superio(2, all_superio, nsuperio);
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/*
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* Initialise interrupt router
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*/
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epicInit(EPIC_SERIAL_IRQ, 1);
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#endif /* PPC */
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#if 0
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/* Now that we have collected all of our information
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* write our configuration tables.
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*/
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write_tables(mem);
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#endif
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elfboot(streams, get_lb_mem());
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printk_debug("Halting...\n");
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for (;;);
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}
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