From e22ced42577c602b3cc28c50e5901b7d7e67966b Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Thu, 5 Feb 2004 15:35:40 +0000 Subject: [PATCH] new mobo! ron --- src/mainboard/chaintech/7kjd/Config | 28 ++++++++++++++++++++ src/mainboard/chaintech/7kjd/irq_tables.c | 32 +++++++++++++++++++++++ src/mainboard/chaintech/7kjd/mainboard.c | 6 +++++ 3 files changed, 66 insertions(+) create mode 100755 src/mainboard/chaintech/7kjd/Config create mode 100755 src/mainboard/chaintech/7kjd/irq_tables.c create mode 100755 src/mainboard/chaintech/7kjd/mainboard.c diff --git a/src/mainboard/chaintech/7kjd/Config b/src/mainboard/chaintech/7kjd/Config new file mode 100755 index 0000000000..b14d42671f --- /dev/null +++ b/src/mainboard/chaintech/7kjd/Config @@ -0,0 +1,28 @@ +arch i386 +mainboardinit cpu/i386/entry16.inc +mainboardinit cpu/i386/entry32.inc +ldscript cpu/i386/entry16.lds +ldscript cpu/i386/entry32.lds + +mainboardinit superio/via/vt8231/setup_serial.inc +mainboardinit pc80/serial.inc +mainboardinit arch/i386/lib/console.inc + +mainboardinit cpu/k7/earlymtrr.inc +mainboardinit southbridge/via/vt8231/ideconfig.inc + +northbridge amd/amd76x +southbridge via/vt8231 + +keyboard pc80 + +cpu k7 + +object mainboard.o +object irq_tables.o + +option HAVE_PIRQ_TABLE=1 +option ENABLE_FIXED_AND_VARIABLE_MTRRS=1 +option SUPERIO_DEVFN=0X88 +option ENABLE_IDE_NATIVE_MODE=0 +#option FINAL_MAINBOARD_FIXUP=1 diff --git a/src/mainboard/chaintech/7kjd/irq_tables.c b/src/mainboard/chaintech/7kjd/irq_tables.c new file mode 100755 index 0000000000..d3eeca8263 --- /dev/null +++ b/src/mainboard/chaintech/7kjd/irq_tables.c @@ -0,0 +1,32 @@ +/* This file was generated by getpir.c, do not modify! + (but if you do, please run checkpir on it to verify) + Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up + + Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM +*/ + +#include + +const struct irq_routing_table intel_irq_routing_table = { + PIRQ_SIGNATURE, /* u32 signature */ + PIRQ_VERSION, /* u16 version */ + 32+16*8, /* there can be total 8 devices on the bus */ + 0, /* Where the interrupt router lies (bus) */ + 0, /* Where the interrupt router lies (dev) */ + 0xc20, /* IRQs devoted exclusively to PCI usage */ + 0, /* Vendor */ + 0, /* Device */ + 0, /* Crap (miniport) */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ + 0x9d, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ + { + {0,0x50, {{0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}, {0x2, 0xdeb8}}, 0x2, 0}, + {0,0x58, {{0x4, 0xdeb8}, {0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}}, 0x3, 0}, + {0,0x60, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0x4, 0}, + {0,0x68, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x5, 0}, + {0,0x70, {{0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}, {0x2, 0xdeb8}}, 0x6, 0}, + {0x1,0x28, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0x7, 0}, + {0,0x8, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0, 0}, + {0x80,0, {{0, 0}, {0, 0}, {0, 0}, {0, 0}}, 0, 0}, + } +}; diff --git a/src/mainboard/chaintech/7kjd/mainboard.c b/src/mainboard/chaintech/7kjd/mainboard.c new file mode 100755 index 0000000000..dc2118cfc9 --- /dev/null +++ b/src/mainboard/chaintech/7kjd/mainboard.c @@ -0,0 +1,6 @@ +void +mainboard_fixup() +{ + void southbridge_fixup(void); + southbridge_fixup(); +}