From e1cbfaac02537716b790d0fe4bd0b5f9d78f1fe8 Mon Sep 17 00:00:00 2001 From: Carl-Daniel Hailfinger Date: Mon, 11 Feb 2008 01:30:24 +0000 Subject: [PATCH] CAR size and CAR base defines are scattered all over the place. Set them centrally from Kconfig, but keep the Kconfig variables hidden. That way, they are available everywhere, you don't have to try to guess where they are set, and they come with help text if you look at arch/x86/Kconfig. No semantic changes, although some of the settings really could use an overhaul. This also is a requirement for my printk buffer patch. Signed-off-by: Carl-Daniel Hailfinger Acked-by: Peter Stuge git-svn-id: svn://coreboot.org/repository/coreboot-v3@587 f3766cd6-281f-0410-b1cd-43a5c92072e9 --- arch/x86/Kconfig | 15 ++++++++++++++- arch/x86/stage0_i586.S | 9 --------- include/arch/x86/amd_geodelx.h | 4 ++-- 3 files changed, 16 insertions(+), 12 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 65432e6904..b396776e1a 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -69,4 +69,17 @@ config SMP coreboot work correctly on symmetric multi processor systems. It is usually set in mainboard/*/Kconfig. - + +config CARBASE + hex + default 0x8f000 if CPU_I586 + default 0x80000 if CPU_AMD_GEODELX + help + This option sets the base address of the area used for CAR. + +config CARSIZE + hex + default 0x1000 if CPU_I586 + default 0x8000 if CPU_AMD_GEODELX + help + This option sets the size of the area used for CAR. diff --git a/arch/x86/stage0_i586.S b/arch/x86/stage0_i586.S index 6a53ce1733..2346567b1d 100644 --- a/arch/x86/stage0_i586.S +++ b/arch/x86/stage0_i586.S @@ -183,18 +183,9 @@ __protected_stage0: * the other is very similar to the AMD CAR, except remove amd specific msr */ -#ifndef CONFIG_CARSIZE -#define CacheSize 4096 -#else #define CacheSize CONFIG_CARSIZE -#endif -/* pick a safer value for default -- i.e. not the C segment! */ -#ifndef CONFIG_CARBASE -#define CacheBase (0x90000 - CacheSize) -#else #define CacheBase CONFIG_CARBASE -#endif #define ASSEMBLY #include "mtrr.h" diff --git a/include/arch/x86/amd_geodelx.h b/include/arch/x86/amd_geodelx.h index 695180b7b7..e4a1779471 100644 --- a/include/arch/x86/amd_geodelx.h +++ b/include/arch/x86/amd_geodelx.h @@ -565,8 +565,8 @@ #define SMM_SIZE 128 /* changed SMM_SIZE from 256 KB to 128 KB */ /* ------------------------ */ -#define DCACHE_RAM_SIZE 0x08000 -#define DCACHE_RAM_BASE 0x80000 +#define DCACHE_RAM_SIZE CONFIG_CARSIZE +#define DCACHE_RAM_BASE CONFIG_CARBASE /* This is where the DCache will be mapped and be used as stack. It would be * cool if it was the same base as coreboot normal stack. */