diff --git a/src/arch/i386/config/crt0.base b/src/arch/i386/config/crt0.base index d5e4f2aac5..f37b08684b 100644 --- a/src/arch/i386/config/crt0.base +++ b/src/arch/i386/config/crt0.base @@ -7,6 +7,9 @@ #include #include +#ifdef SMP +#include +#endif /* * This is the entry code (the mkrom(8) utility makes a jumpvector * to this adddess. @@ -20,9 +23,6 @@ * %fl = 0x0002 */ .text - .code16 - -#include CRT0_PARAMETERS @@ -121,17 +121,3 @@ str_after_ram: .string "Ram Initialize?\r\n" str_after_copy: .string "after copy?\r\n" str_pre_main: .string "before main\r\n" newline: .string "\r\n" - - .section ".reset_vector" - .code16 -.globl EXT(reset_vector) -EXT(reset_vector): -#if _ROMBASE >= 0xffff0000 - jmp EXT(_start) -#elif (_ROMBASE < 0x100000) - ljmp $((_ROMBASE & 0xf0000)>>4),$EXT(_start_offset); -#else -#error _ROMBASE is an unsupported value -#endif - - \ No newline at end of file diff --git a/src/arch/i386/config/ldscript.base b/src/arch/i386/config/ldscript.base index 5ee73c1910..85fc5d2125 100644 --- a/src/arch/i386/config/ldscript.base +++ b/src/arch/i386/config/ldscript.base @@ -9,9 +9,6 @@ * _ROMBASE * : linuxbios text * : readonly text - * - * _ROMTOP : The top of the rom used where we - * need to put the reset vector. */ /* * Bootstrap code for the STPC Consumer @@ -21,9 +18,6 @@ * */ -_ROMTOP = (_ROMBASE >= 0xffff0000)? 0xfffffff0 : 0xffff0; -_start_offset = _start & 0xffff; -gdtptr_offset = gdtptr & 0xffff; /* * Written by Johan Rydberg, based on work by Daniel Kahlin. * Rewritten by Eric Biederman @@ -35,11 +29,6 @@ gdtptr_offset = gdtptr & 0xffff; OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386") OUTPUT_ARCH(i386) -/* - * Entry point is not really nececary, since the mkrom(8) - * tool creates a entry point that jumps to $0xc000:0x0000. - */ -/* baloney, but ... RGM*/ ENTRY(_start) SECTIONS @@ -52,7 +41,6 @@ SECTIONS .text (.) : { _text = .; *(.text); - *(.text.*) _etext = .; } .rodata (.) : { @@ -73,8 +61,6 @@ SECTIONS .data (.): AT(_erodata) { _data = .; *(.data) - *(.sdata) - *(.sdata2) _edata = .; } _ldata = LOADADDR(.data); @@ -105,14 +91,8 @@ SECTIONS . = ((MAX_CPUS) * (STACK_SIZE)); _estack = .; } - _lreset = _ROMTOP; - . = _lreset; - .reset (.) : AT (_lreset) { - *(.reset_vector) - . = 15 ; - BYTE(0x00); - } - _elreset = _lreset + SIZEOF(.reset); + + /DISCARD/ : { *(*) } diff --git a/src/arch/i386/include/stddef.h b/src/arch/i386/include/stddef.h index 22867ad8b2..4bf6b0a867 100644 --- a/src/arch/i386/include/stddef.h +++ b/src/arch/i386/include/stddef.h @@ -12,4 +12,4 @@ typedef unsigned int wint_t; #define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER) -#endif //I386_STDDEF_H +#endif /* I386_STDDEF_H */ diff --git a/src/cpu/i386/entry16.inc b/src/cpu/i386/entry16.inc new file mode 100644 index 0000000000..52b693e8f8 --- /dev/null +++ b/src/cpu/i386/entry16.inc @@ -0,0 +1,137 @@ +/* +This software and ancillary information (herein called SOFTWARE ) +called LinuxBIOS is made available under the terms described +here. The SOFTWARE has been approved for release with associated +LA-CC Number 00-34 . Unless otherwise indicated, this SOFTWARE has +been authored by an employee or employees of the University of +California, operator of the Los Alamos National Laboratory under +Contract No. W-7405-ENG-36 with the U.S. Department of Energy. The +U.S. Government has rights to use, reproduce, and distribute this +SOFTWARE. The public may copy, distribute, prepare derivative works +and publicly display this SOFTWARE without charge, provided that this +Notice and any statement of authorship are reproduced on all copies. +Neither the Government nor the University makes any warranty, express +or implied, or assumes any liability or responsibility for the use of +this SOFTWARE. If SOFTWARE is modified to produce derivative works, +such modified SOFTWARE should be clearly marked, so as not to confuse +it with the version available from LANL. + */ +/* Copyright 2000, Ron Minnich, Advanced Computing Lab, LANL + * rminnich@lanl.gov + */ + + +/** Start code to put an i386 or later processor into 32-bit + * protected mode. + */ + +.text +.code16 +.globl EXT(_start) +.type EXT(_start), @function + +/// We have a relative jump here to around the GDT. +EXT(_start): jmp _realstart +/** This gdt has a 4 Gb code segment at 0x10, and a 4 GB data segment + * at 0x18; these are Linux-compatible. + */ + +/** GDT. we have modified this from the original freebios to make it + * compatible with linux. This puts text at seg 0x10 and data at 0x18 + */ +.globl EXT(gdtptr) +EXT(gdtptr): + .word 4*8-1 + .long gdt /* we know the offset */ +gdt: + .word 0x0000, 0x0000 /* dummy */ + .byte 0x0, 0x0, 0x0, 0x0 + + .word 0x0000, 0x0000 /* dummy */ + .byte 0x0, 0x0, 0x0, 0x0 + + .word 0xffff, 0x0000 /* flat code segment */ + .byte 0x0, 0x9a, 0xcf, 0x0 + + .word 0xffff, 0x0000 /* flat data segment */ + .byte 0x0, 0x92, 0xcf, 0x0 + + +_realstart: + cli + +/* thanks to kmliu@sis.tw.com for this TBL fix ... */ +/**/ +/* IMMEDIATELY invalidate the translation lookaside buffer before executing*/ +/* any further code. Even though paging is we, disabled could still get*/ +/*false address translations due to the TLB if we didn't invalidate it.*/ +/**/ + xor %eax, %eax + mov %eax, %cr3 /* Invalidate TLB*/ + + /* invalidate the cache */ + invd + + /* Note: gas handles memory addresses in 16 bit code very poorly. + * In particular it doesn't appear to have a directive allowing you + * associate a section or even an absolute offset with a segment register. + * + * This means that anything except cs:ip relative offsets are + * a real pain in 16 bit mode. And explains why it is almost + * imposible to get gas to do lgdt correctly. + * + * One way to work around this is to have the linker do the + * math instead of the assembler. This solves the very + * pratical problem of being able to write code that can + * be relocated. + * + * An lgdt call before we have memory enabled cannot be + * position independent, as we cannot execute a call + * instruction to get our current instruction pointer. + * So while this code is relocateable it isn't arbitrarily + * relocatable. + * + * In particular this code can be run with the base address of + * the code segment at either 0xffff0000 or 0xf0000. + * The first is what is initiallly loaded when the processor + * powers on. The second is normal real mode segment 0xf000. + * + * At this point all the linker script does when calculating + * gdtptr_offset is return the low 16 bits so your segment + * must be 64K aligned. So it wouldn't be too much work + * to support other segments, I just don't see the point + * right now. + */ + data32 lgdt %cs:EXT(gdtptr_offset) + + movl %cr0, %eax + andl $0x7FFAFFD1, %eax /* PG,AM,WP,NE,TS,EM,MP = 0 */ + orl $0x60000001, %eax /* CD, NW, PE = 1 */ + movl %eax, %cr0 + + /* Now that we are in protected mode jump to a 32 bit code segment. */ + data32 ljmp $0x10, $.Lprotected + +/* + * When we come here we are in protected mode. We expand + * the stack and copies the data segment from ROM to the + * memory. + * + * After that, we call the chipset bootstrap routine that + * does what is left of the chipset initialization. + * + * NOTE aligned to 4 so that we are sure that the prefetch + * cache will be reloaded. + */ + .align 4 +.Lprotected: + .code32 + intel_chip_post_macro(0x10) /* post 10 */ + + movw $0x18, %ax + movw %ax, %ds + movw %ax, %es + movw %ax, %ss + movw %ax, %fs + movw %ax, %gs + diff --git a/src/cpu/i386/entry16.lds b/src/cpu/i386/entry16.lds new file mode 100644 index 0000000000..d0286b3de9 --- /dev/null +++ b/src/cpu/i386/entry16.lds @@ -0,0 +1,2 @@ + gdtptr_offset = gdtptr & 0xffff; + _start_offset = _start & 0xffff; diff --git a/src/cpu/i386/entry32.inc b/src/cpu/i386/entry32.inc new file mode 100644 index 0000000000..7e855f910e --- /dev/null +++ b/src/cpu/i386/entry32.inc @@ -0,0 +1,5 @@ + /* For starting linuxBIOS in protected mode */ + .text + .align 4 + .code32 + intel_chip_post_macro(0x10) /* post 10 */ diff --git a/src/cpu/i386/reset16.inc b/src/cpu/i386/reset16.inc new file mode 100644 index 0000000000..8ad1a77dcb --- /dev/null +++ b/src/cpu/i386/reset16.inc @@ -0,0 +1,24 @@ + .section ".text.reset_vector" + .code16 +.globl EXT(reset_vector) +EXT(reset_vector): +#if _ROMBASE >= 0xffff0000 + /* Hmm. + * _start_offset is the low 16 bits of _start. + * Theoretically we should have problems but it compiles + * and links properly with binutils 2.9.5 & 2.10.90 + * This is probably a case that needs fixing in binutils. + * And then we can just use _start. + * We also need something like the assume directive in + * other assemblers to tell it where the segment registers + * are pointing in memory right now. + */ + jmp EXT(_start_offset) +#elif (_ROMBASE < 0x100000) + ljmp $((_ROMBASE & 0xf0000)>>4),$EXT(_start_offset); +#else +#error _ROMBASE is an unsupported value +#endif + + .text + .code32 diff --git a/src/cpu/i386/reset16.lds b/src/cpu/i386/reset16.lds new file mode 100644 index 0000000000..e58b8ef2c3 --- /dev/null +++ b/src/cpu/i386/reset16.lds @@ -0,0 +1,17 @@ +/* + * _ROMTOP : The top of the rom used where we + * need to put the reset vector. + */ + _ROMTOP = (_ROMBASE >= 0xffff0000)? 0xfffffff0 : 0xffff0; + +SECTIONS { + . = _ROMTOP; + .text.reset_vector (.): { + *(.text.reset_vector) + . = 15 ; + BYTE(0x00); + } + /DISCARD/ : { + *(*) + } +} diff --git a/src/cpu/p6/mtrr.c b/src/cpu/p6/mtrr.c index 07269f3628..46188a42b5 100644 --- a/src/cpu/p6/mtrr.c +++ b/src/cpu/p6/mtrr.c @@ -214,8 +214,6 @@ static __inline__ unsigned int fms(unsigned int x) * or a 156MB (128MB + 32MB - 4MB SMA) example: * ramsize = 156MB == 128MB WB (at 0MB) + 32MB WB (at 128MB) + 4MB UC (at 156MB) */ -#ifdef INTEL_PPRO_MTRR - /* 2 MTRRS are reserved for the operating system */ #define BIOS_MTRRS 6 #define OS_MTRRS 2 @@ -291,4 +289,3 @@ void setup_mtrrs(unsigned long ramsizeK) intel_enable_fixed_mtrr(); intel_enable_var_mtrr(); } -#endif /* INTEL_PPRO_MTRR */ diff --git a/src/mainboard/asus/cua/Config b/src/mainboard/asus/cua/Config index 98100f9167..f32f5b67ea 100644 --- a/src/mainboard/asus/cua/Config +++ b/src/mainboard/asus/cua/Config @@ -1,4 +1,6 @@ arch i386 +mainboardinit cpu/i386/entry32.inc + mainboardinit superio/acer/m1535/setup_serial.inc mainboardinit pc80/serial.inc northbridge acer/m1631 diff --git a/src/mainboard/dell/350/Config b/src/mainboard/dell/350/Config index 617a5120fb..a3c7cec4ef 100644 --- a/src/mainboard/dell/350/Config +++ b/src/mainboard/dell/350/Config @@ -1,4 +1,9 @@ arch i386 +mainboardinit cpu/i386/entry16.inc +ldscript cpu/i386/entry16.lds +mainboardinit cpu/i386/reset16.inc +ldscript cpu/i386/reset16.lds + mainboardinit superio/SMC/fdc37b907/setup_serial.inc mainboardinit pc80/serial.inc northbridge intel/440bx diff --git a/src/mainboard/gigabit/ga-6bxc/Config b/src/mainboard/gigabit/ga-6bxc/Config index 03ba04489f..32741bcc31 100644 --- a/src/mainboard/gigabit/ga-6bxc/Config +++ b/src/mainboard/gigabit/ga-6bxc/Config @@ -1,4 +1,9 @@ arch i386 +mainboardinit cpu/i386/entry16.inc +ldscript cpu/i386/entry16.lds +mainboardinit cpu/i386/reset16.inc +ldscript cpu/i386/reset16.lds + mainboardinit superio/ITE/it8671f/setup_serial.inc mainboardinit pc80/serial.inc northbridge intel/440bx diff --git a/src/mainboard/intel/l440bx/Config b/src/mainboard/intel/l440bx/Config index 92a2eb1006..62d73ae383 100644 --- a/src/mainboard/intel/l440bx/Config +++ b/src/mainboard/intel/l440bx/Config @@ -1,4 +1,9 @@ arch i386 +mainboardinit cpu/i386/entry16.inc +ldscript cpu/i386/entry16.lds +mainboardinit cpu/i386/reset16.inc +ldscript cpu/i386/reset16.lds + mainboardinit superio/SMC/fdc37c669/setup_serial.inc mainboardinit pc80/serial.inc northbridge intel/440bx diff --git a/src/mainboard/intel/l440gx/Config b/src/mainboard/intel/l440gx/Config index 70684c1a3b..ec1fb54b97 100644 --- a/src/mainboard/intel/l440gx/Config +++ b/src/mainboard/intel/l440gx/Config @@ -1,4 +1,9 @@ arch i386 +mainboardinit cpu/i386/entry16.inc +ldscript cpu/i386/entry16.lds +mainboardinit cpu/i386/reset16.inc +ldscript cpu/i386/reset16.lds + mainboardinit superio/NSC/pc87309/setup_serial.inc mainboardinit pc80/serial.inc northbridge intel/440gx @@ -16,6 +21,7 @@ option L440GX option IOAPIC=1 option SMP=1 option MAX_CPUS=2 +option HAVE_MP_TABLE=1 object mainboard.o object mptable.o diff --git a/src/mainboard/intel/l440gx/mptable.c b/src/mainboard/intel/l440gx/mptable.c index 1b2cab481c..63224a04e1 100644 --- a/src/mainboard/intel/l440gx/mptable.c +++ b/src/mainboard/intel/l440gx/mptable.c @@ -1,5 +1,6 @@ -#include +#include #include +#include void smp_write_config_table(void *v) { diff --git a/src/mainboard/irobot/proto1/Config b/src/mainboard/irobot/proto1/Config index 960e3510dc..993750024f 100644 --- a/src/mainboard/irobot/proto1/Config +++ b/src/mainboard/irobot/proto1/Config @@ -1,4 +1,9 @@ arch i386 +mainboardinit cpu/i386/entry16.inc +ldscript cpu/i386/entry16.lds +mainboardinit cpu/i386/reset16.inc +ldscript cpu/i386/reset16.lds + mainboardinit superio/SMC/fdc37n769/setup_serial.inc mainboardinit pc80/serial.inc northbridge intel/440bx diff --git a/src/mainboard/lanner/em-370/Config b/src/mainboard/lanner/em-370/Config index 8f6b524929..67cdb4dd4c 100644 --- a/src/mainboard/lanner/em-370/Config +++ b/src/mainboard/lanner/em-370/Config @@ -1,4 +1,9 @@ arch i386 +mainboardinit cpu/i386/entry16.inc +ldscript cpu/i386/entry16.lds +mainboardinit cpu/i386/reset16.inc +ldscript cpu/i386/reset16.lds + mainboardinit superio/winbond/w83977ef/setup_serial.inc mainboardinit pc80/serial.inc northbridge intel/440bx diff --git a/src/mainboard/leadtek/winfast6300/Config b/src/mainboard/leadtek/winfast6300/Config index 15a09d03a6..9be07111a0 100644 --- a/src/mainboard/leadtek/winfast6300/Config +++ b/src/mainboard/leadtek/winfast6300/Config @@ -1,4 +1,7 @@ arch i386 +mainboardinit cpu/i386/entry16.inc +ldscript cpu/i386/entry16.lds + mainboardinit superio/sis/950/setup_serial.inc mainboardinit pc80/serial.inc northsouthbridge sis/630 @@ -8,7 +11,7 @@ mainboardinit cpu/p6/earlymtrr.inc option ENABLE_FIXED_AND_VARIABLE_MTRRS option FINAL_MAINBOARD_FIXUP -option HAVE_PIRQ_TABLE +option HAVE_PIRQ_TABLE=1 object mainboard.o object irq_tables.o keyboard pc80 diff --git a/src/mainboard/matsonic/ms7308e/Config b/src/mainboard/matsonic/ms7308e/Config index 15a09d03a6..3a74245004 100644 --- a/src/mainboard/matsonic/ms7308e/Config +++ b/src/mainboard/matsonic/ms7308e/Config @@ -1,4 +1,7 @@ arch i386 +mainboardinit cpu/i386/entry16.inc +ldscript cpu/i386/entry16.lds + mainboardinit superio/sis/950/setup_serial.inc mainboardinit pc80/serial.inc northsouthbridge sis/630 diff --git a/src/mainboard/pcchips/m754lmr/Config b/src/mainboard/pcchips/m754lmr/Config index 98100f9167..4825e3cad6 100644 --- a/src/mainboard/pcchips/m754lmr/Config +++ b/src/mainboard/pcchips/m754lmr/Config @@ -1,4 +1,9 @@ arch i386 +mainboardinit cpu/i386/entry16.inc +ldscript cpu/i386/entry16.lds +mainboardinit cpu/i386/reset16.inc +ldscript cpu/i386/reset16.lds + mainboardinit superio/acer/m1535/setup_serial.inc mainboardinit pc80/serial.inc northbridge acer/m1631 diff --git a/src/mainboard/pcchips/m810lmr/Config b/src/mainboard/pcchips/m810lmr/Config index e34e7ff5b7..f7fc361730 100644 --- a/src/mainboard/pcchips/m810lmr/Config +++ b/src/mainboard/pcchips/m810lmr/Config @@ -1,4 +1,7 @@ arch i386 +mainboardinit cpu/i386/entry16.inc +ldscript cpu/i386/entry16.lds + mainboardinit superio/sis/950/setup_serial.inc mainboardinit pc80/serial.inc northsouthbridge sis/730 diff --git a/src/mainboard/sis/540/Config b/src/mainboard/sis/540/Config index da25731289..6b48000f04 100644 --- a/src/mainboard/sis/540/Config +++ b/src/mainboard/sis/540/Config @@ -1,4 +1,7 @@ arch i386 +mainboardinit cpu/i386/entry16.inc +ldscript cpu/i386/entry16.lds + mainboardinit superio/sis/950/setup_serial.inc mainboardinit pc80/serial.inc northsouthbridge sis/540 diff --git a/src/mainboard/sis/550/Config b/src/mainboard/sis/550/Config index c657769954..1bebcd1846 100644 --- a/src/mainboard/sis/550/Config +++ b/src/mainboard/sis/550/Config @@ -1,4 +1,7 @@ arch i386 +mainboardinit cpu/i386/entry16.inc +ldscript cpu/i386/entry16.lds + northsouthbridge sis/550 mainboardinit cpu/p6/earlymtrr.inc diff --git a/src/mainboard/tyan/guiness/Config b/src/mainboard/tyan/guiness/Config index 767199c86f..56fcc6134c 100644 --- a/src/mainboard/tyan/guiness/Config +++ b/src/mainboard/tyan/guiness/Config @@ -1,4 +1,9 @@ arch i386 +mainboardinit cpu/i386/entry16.inc +ldscript cpu/i386/entry16.lds +mainboardinit cpu/i386/reset16.inc +ldscript cpu/i386/reset16.lds + mainboardinit northbridge/amd/amd76x/reset_test.inc mainboardinit cpu/k7/earlymtrr.inc mainboardinit northbridge/amd/amd76x/mpinit.inc diff --git a/src/mainboard/tyan/guiness/mptable.c b/src/mainboard/tyan/guiness/mptable.c index d90827bd1d..ee5a374a5b 100644 --- a/src/mainboard/tyan/guiness/mptable.c +++ b/src/mainboard/tyan/guiness/mptable.c @@ -3,7 +3,6 @@ #include #include -#define USE_ALL_CPUS 1 void smp_write_config_table(void *v) { static const char sig[4] = "PCMP"; diff --git a/src/mainboard/tyan/s1834/Config b/src/mainboard/tyan/s1834/Config index b5414c9aaa..e6d2d50f93 100644 --- a/src/mainboard/tyan/s1834/Config +++ b/src/mainboard/tyan/s1834/Config @@ -1,4 +1,9 @@ arch i386 +mainboardinit cpu/i386/entry16.inc +ldscript cpu/i386/entry16.lds +mainboardinit cpu/i386/reset16.inc +ldscript cpu/i386/reset16.lds + mainboardinit superio/winbond/w83977ef/setup_serial.inc mainboardinit pc80/serial.inc mainboardinit northbridge/via/vt8601/raminit.inc diff --git a/src/mainboard/via/vt5292/Config b/src/mainboard/via/vt5292/Config index 77ab6668cb..addd48fd99 100644 --- a/src/mainboard/via/vt5292/Config +++ b/src/mainboard/via/vt5292/Config @@ -1,4 +1,9 @@ arch i386 +mainboardinit cpu/i386/entry16.inc +ldscript cpu/i386/entry16.lds +mainboardinit cpu/i386/reset16.inc +ldscript cpu/i386/reset16.lds + mainboardinit superio/via/vt82c686/setup_serial.inc mainboardinit pc80/serial.inc northbridge via/vt8601 diff --git a/src/mainboard/via/vt5426/Config b/src/mainboard/via/vt5426/Config index a1ec1fd234..ea07299927 100644 --- a/src/mainboard/via/vt5426/Config +++ b/src/mainboard/via/vt5426/Config @@ -1,4 +1,7 @@ arch i386 +mainboardinit cpu/i386/entry16.inc +ldscript cpu/i386/entry16.lds + mainboardinit superio/via/vt82c686/setup_serial.inc mainboardinit pc80/serial.inc northbridge via/vt8601 diff --git a/src/northbridge/intel/440gx/Config b/src/northbridge/intel/440gx/Config index 78bb542ca2..f5e041c79d 100644 --- a/src/northbridge/intel/440gx/Config +++ b/src/northbridge/intel/440gx/Config @@ -1,5 +1,6 @@ -raminit northbridge/intel/440gx/raminit.inc -raminit sdram/generic_sdram.inc -raminit sdram/generic_sdram_enable.inc +mainboardinit northbridge/intel/440gx/raminit.inc +mainboardinit sdram/generic_sdram_enable.inc +mainboardinit sdram/generic_sdram.inc +mainboardinit sdram/generic_zero_ecc_sdram.inc object northbridge.o diff --git a/src/northbridge/intel/440gx/raminit.inc b/src/northbridge/intel/440gx/raminit.inc index 8ef50c7d90..26897f8c20 100644 --- a/src/northbridge/intel/440gx/raminit.inc +++ b/src/northbridge/intel/440gx/raminit.inc @@ -968,17 +968,14 @@ ram_set_spd_registers: #endif RET_LABEL(ram_set_spd_registers) -#if 1 -#define HAVE_ECC_RAM_SIZE -get_ecc_ram_size_ebx: +get_ecc_ram_size_bytes_ebx: + /* FIXME handle the no ram case. */ movl $0x67, %eax /* Read the RAM SIZE */ PCI_READ_CONFIG_BYTE andl $0x000000ff, %eax /* Convert it to bytes */ movl %eax, %ebx shll $23, %ebx - RET_LABEL(get_ecc_ram_size_ebx) -#endif /* HAVE_ECC_RAM_SIZE */ - + RET_LABEL(get_ecc_ram_size_bytes_ebx) /* things that are not used */ #define FIRST_NORMAL_REFERENCE() diff --git a/src/northsouthbridge/sis/540/northbridge.c b/src/northsouthbridge/sis/540/northbridge.c index 4185beb348..887f756f0a 100644 --- a/src/northsouthbridge/sis/540/northbridge.c +++ b/src/northsouthbridge/sis/540/northbridge.c @@ -16,7 +16,6 @@ static char rcsid[] = #include #include #include -#include /* these functions query the hardware to figure out how much ram is in * the machine. They then place that information in the parameter block. diff --git a/src/northsouthbridge/sis/540/southbridge.c b/src/northsouthbridge/sis/540/southbridge.c index 87151b622d..cf356d5a82 100644 --- a/src/northsouthbridge/sis/540/southbridge.c +++ b/src/northsouthbridge/sis/540/southbridge.c @@ -16,8 +16,7 @@ static char rcsid[] = #include #include #include -#include -#include +#include void keyboard_on() { diff --git a/src/northsouthbridge/sis/550/northbridge.c b/src/northsouthbridge/sis/550/northbridge.c index 399ffc58e7..4862b67abc 100644 --- a/src/northsouthbridge/sis/550/northbridge.c +++ b/src/northsouthbridge/sis/550/northbridge.c @@ -16,7 +16,6 @@ static char rcsid[] = #include #include #include -#include /* these functions query the hardware to figure out how much ram is in * the machine. They then place that information in the parameter block. diff --git a/src/northsouthbridge/sis/550/southbridge.c b/src/northsouthbridge/sis/550/southbridge.c index dee421dcc0..37a537f738 100644 --- a/src/northsouthbridge/sis/550/southbridge.c +++ b/src/northsouthbridge/sis/550/southbridge.c @@ -16,8 +16,7 @@ static char rcsid[] = #include #include #include -#include -#include +#include void keyboard_on() { diff --git a/src/northsouthbridge/sis/730/northbridge.c b/src/northsouthbridge/sis/730/northbridge.c index 9433e31d75..dc94037b06 100644 --- a/src/northsouthbridge/sis/730/northbridge.c +++ b/src/northsouthbridge/sis/730/northbridge.c @@ -16,7 +16,6 @@ static char rcsid[] = #include #include #include -#include /* these functions query the hardware to figure out how much ram is in * the machine. They then place that information in the parameter block. diff --git a/src/northsouthbridge/sis/730/southbridge.c b/src/northsouthbridge/sis/730/southbridge.c index 5f10bc6041..1c17e29a3f 100644 --- a/src/northsouthbridge/sis/730/southbridge.c +++ b/src/northsouthbridge/sis/730/southbridge.c @@ -16,7 +16,6 @@ static char rcsid[] = #include #include #include -#include #include void keyboard_on() diff --git a/util/config/NLBConfig.py b/util/config/NLBConfig.py index 3139aa64bf..5cf9bc0e99 100644 --- a/util/config/NLBConfig.py +++ b/util/config/NLBConfig.py @@ -36,6 +36,7 @@ mainrulelist = "all" def add_main_rule_dependency(new_dependency): global mainrulelist mainrulelist = mainrulelist + ' ' + new_dependency + # function to add an object to the set of objects to be made. # this is a tuple, object name, source it depends on, # and an optional rule (can be empty) for actually building @@ -62,7 +63,7 @@ def top(dir, top_name): def target(dir, targ_name): global outputdir - outputdir = targ_name + outputdir = os.path.join(config_dir(), targ_name) if os.path.isdir(outputdir): print 'Will place Makefile, crt0.S, ldscript.ld in ', outputdir else: @@ -229,6 +230,15 @@ def mainboardinit(dir, file): mainboardfilelist.append(file) print "Added mainboard init file: ", file + +# A set of linker scripts needed by linuxBIOS. +def ldscript(dir, file): + ldscripts = command_vals['ldscripts'] + filepath = os.path.join(treetop, 'src'); + filepath = os.path.join(filepath, file); + ldscripts.append(filepath) + print "Added ldscript init file: ", filepath + def object(dir, command): wspc = string.whitespace command_re = re.compile("([^" + wspc + "]+)([" + wspc + "]([^" + wspc + "]*)|)") @@ -341,8 +351,8 @@ def docipl(dir, ipl_name): # Now we need a mainboard-specific include path userrules.append("\tcc $(CFLAGS) -I%s -c $<" % mainboard_dir) # now set new values for the ldscript.ld. Should be a script? - set_option("_RAMBASE", 0x4000) - set_option("_ROMBASE", 0x80000) + set_option("_RAMBASE", "0x4000") + set_option("_ROMBASE", "0x80000") def linux(dir, linux_name): linuxrule = 'LINUX=' + linux_name @@ -373,6 +383,7 @@ command_vals = { 'object' : {}, # path/filename.[cS] 'mainboardinit' : [], # set of files to include for mainboard init 'config_files' : [], # set of files we built the makefile from + 'ldscripts' : [], # set of files we build the linker script from } command_actions = { @@ -391,6 +402,7 @@ command_actions = { 'linux' : linux, 'raminit' : raminit, 'mainboardinit' : mainboardinit, + 'ldscript' : ldscript, 'dir' : dir, 'keyboard' : keyboard, 'docipl' : docipl, @@ -457,6 +469,11 @@ def doconfigfile(dir, filename): print verb, "is not a valid command! \n" sys.exit() +def config_dir(): + config_file_list = command_vals['config_files'] + config_file = config_file_list[len(config_file_list) -1] + return os.path.dirname(config_file) + # output functions # write crt0 def writecrt0(path): @@ -507,6 +524,7 @@ def writecrt0(path): # write ldscript def writeldscript(path): ldfilepath = os.path.join(path, "ldscript.ld") + ldscripts = command_vals['ldscripts'] print "Trying to create ", ldfilepath # try: file = open(ldfilepath, 'w+') @@ -515,7 +533,8 @@ def writeldscript(path): keys.sort() for key in keys: value = makeoptions[key] - if re.match("^(0x[0-9a-fA-F]+|0[0-7]+|[0-9]+)$", value): + regexp = re.compile(r"^(0x[0-9a-fA-F]+|0[0-7]+|[0-9]+)$") + if value and regexp.match(value): file.write("%s = %s;\n" % (key, value)) ldlines = readfile(ldscriptbase) @@ -523,6 +542,10 @@ def writeldscript(path): print "LDLINES ",ldlines for line in ldlines: file.write(line) + + for i in range(len(ldscripts)): + file.write("INCLUDE %s\n" % ldscripts[i]) + file.close(); # write doxygen file @@ -561,6 +584,7 @@ def writemakefile(path): makefilepath = os.path.join(path, "Makefile") mainboardinitfiles = command_vals['mainboardinit'] config_file_list = command_vals['config_files'] + ldscripts = command_vals['ldscripts'] print "Trying to create ", makefilepath keys = makeoptions.keys() @@ -572,7 +596,7 @@ def writemakefile(path): if makeoptions[key] : file.write("%s=%s\n" % (key, makeoptions[key])) - file.write("CPUFLAGS=\n") + file.write("CPUFLAGS :=\n") for key in keys: # print "key is %s, val %s\n" % (key, makeoptions[key]) # file.write("CPUFLAGS += %s\n" % (makeoptions[key])) @@ -638,9 +662,13 @@ def writemakefile(path): for i in range(len(mainboardinitfiles)): file.write("crt0.s: $(TOP)/src/%s\n" % mainboardinitfiles[i]) + # print out the dependencis for ldscript.ld + for i in range(len(ldscripts)): + file.write("ldscript.ld: %s\n" % ldscripts[i]) + # print out the dependencies for Makefile - file.write("Makefile crt0.S ldscript.ld nsuperio.c: %s/%s $(TOP)/util/config/NLBConfig.py $(TOP)/src/arch/$(ARCH)/config/make.base $(TOP)/src/arch/$(ARCH)/config/ldscript.base $(TOP)/src/arch/$(ARCH)/config/crt0.base \n\tpython $(TOP)/util/config/NLBConfig.py %s/%s $(TOP)\n" - % (config_path, config_file, config_path, config_file)) + file.write("Makefile crt0.S ldscript.ld nsuperio.c: %s $(TOP)/util/config/NLBConfig.py $(TOP)/src/arch/$(ARCH)/config/make.base $(TOP)/src/arch/$(ARCH)/config/ldscript.base $(TOP)/src/arch/$(ARCH)/config/crt0.base \n\tpython $(TOP)/util/config/NLBConfig.py %s $(TOP)\n" + % (config_file, config_file)) for i in range(len(config_file_list)): file.write("Makefile: %s\n" % config_file_list[i]) @@ -667,10 +695,10 @@ if len(sys.argv) != 3: print "LBConfig \n" sys.exit() -config_path, config_file = os.path.split(sys.argv[1]) +config_file = os.path.abspath(sys.argv[1]) # determine current directory and set default TOP -command_vals['TOP'] = sys.argv[2] +command_vals['TOP'] = os.path.abspath(sys.argv[2]) treetop = command_vals['TOP'] # set the default locations for config files @@ -685,7 +713,7 @@ doxyscriptbase = os.path.join(treetop, "src/config/doxyscript.base") #doconfigfile(treetop, makebase) # now read in the customizing script -doconfigfile(treetop, sys.argv[1]) +doconfigfile(treetop, config_file) # print out command values #print "Command Values:"