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https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
first cleanup for Tiger MPX
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parent
85a2836b28
commit
dcf2475079
3 changed files with 8 additions and 9 deletions
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@ -58,8 +58,7 @@ mainboardinit northbridge/amd/amd76x/mpinit.inc USE_FALLBACK_IMAGE
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## Failover if we need to
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## Failover if we need to
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##
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##
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#comment out 4 debug SMJ
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mainboardinit southbridge/amd/amd768/cmos_boot_failover.inc USE_FALLBACK_IMAGE
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#mainboardinit southbridge/amd/amd768/cmos_boot_failover.inc USE_FALLBACK_IMAGE
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###
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###
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### O.k. We aren't just an intermediary anymore!
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### O.k. We aren't just an intermediary anymore!
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@ -218,6 +217,7 @@ option FINAL_MAINBOARD_FIXUP=1
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## This is useful for optional includes
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## This is useful for optional includes
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##
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##
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option USE_FALLBACK_IMAGE=0
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option USE_FALLBACK_IMAGE=0
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expr BUILD_NORMAL_IMAGE=!USE_FALLBACK_IMAGE
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expr BUILD_NORMAL_IMAGE=!USE_FALLBACK_IMAGE
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###
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###
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@ -26,7 +26,7 @@ entries
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0 384 r 0 reserved_memory
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0 384 r 0 reserved_memory
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384 1 e 4 boot_option
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384 1 e 4 boot_option
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385 1 e 4 last_boot
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385 1 e 4 last_boot
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386 3 e 5 baud_rate
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392 3 e 5 baud_rate
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392 4 e 6 debug_level
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392 4 e 6 debug_level
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396 1 e 1 power_on_after_fail
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396 1 e 1 power_on_after_fail
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#401 1 e 1 ECC_memory
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#401 1 e 1 ECC_memory
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@ -35,13 +35,12 @@ SECTIONS
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__bss_start = .; /* BSS */
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__bss_start = .; /* BSS */
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.bss (.): {
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.bss (.): {
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*(.bss)
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*(.bss)
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_ebss = .;
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_heap = .;
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. += HEAPSIZE;
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_eheap = .;
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}
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}
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_ebss = .;
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_heap = .;
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.heap (.): {
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. = HEAPSIZE;
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}
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_eheap = .;
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_end = . ;
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_end = . ;
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_ram_seg = _text;
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_ram_seg = _text;
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